Put a TCP/UDP/IP Turbo Into Your FPGA-SmartNIC How MLE and Fraunhofer HHI are breaking the 500 MHz fMax barrier in network protocol acceleration (TCP/IP stack) by using Intel Agilex FPGAs as an FPGA SmartNIC. Summary MLE provides full system stacks including FPGAs, with a focus on networking for HPC, datacenter, or telecommunications. Often, we implement … Continue reading Put a TCP/UDP/IP Turbo Into Your FPGA-SmartNIC