{"id":59,"date":"2023-07-10T07:44:19","date_gmt":"2023-07-10T14:44:19","guid":{"rendered":"https:\/\/www.missinglinkelectronics.com\/devzone\/?page_id=59"},"modified":"2024-06-19T02:13:12","modified_gmt":"2024-06-19T09:13:12","slug":"home","status":"publish","type":"page","link":"https:\/\/www.missinglinkelectronics.com\/devzone\/","title":{"rendered":"MLE Developer Zone"},"content":{"rendered":"\n

Welcome to MLE FPGA Developer Zone<\/strong><\/p>\n\n\n\n

Here you can step into MLE’s technology features and insiders for FPGA development.
Learn more about how MLE can make things work!<\/p>\n\n\n\n

<\/div>\n\n\n\n
\n
\n

Corundum FPGA NIC<\/a><\/strong><\/p>\n\n\n\n

Application Notes<\/a><\/strong><\/p>\n\n\n\n

Linux Cross Reference<\/a><\/strong><\/p>\n<\/div>\n\n\n\n

\n

Downloads for the Corundum FPGA NIC project.<\/p>\n\n\n\n

Collection of MLE’s Application Notes and Technical Briefings.<\/p>\n\n\n\n

MLE provides its own Linux Cross Referencer.<\/p>\n<\/div>\n<\/div>\n\n\n\n

If you own a device or subsystem from MLE you will see the following numbers:<\/p>\n\n\n\n

\n
\n
vendor ID for PCIe devices<\/td>0x22db<\/td><\/tr>
vendor ID for IEEE Mac Adresses<\/td>8C-1F-64-47-Ax-xx (0-00 to F-FF)<\/td><\/tr><\/tbody><\/table><\/figure>\n<\/div>\n<\/div>\n\n\n\n
\"MLE<\/figure>\n\n\n\n
<\/div>\n\n\n\n

Privacy Policy<\/a> | Terms & Conditions<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

Welcome to MLE FPGA Developer Zone Here you can step into MLE’s technology features and insiders for FPGA development.Learn more about how MLE can make things work! Corundum FPGA NIC Application Notes Linux Cross Reference Downloads for the Corundum FPGA NIC project. Collection of MLE’s Application Notes and Technical Briefings. MLE provides its own Linux<\/p>\n

Read More<\/a><\/p>\n","protected":false},"author":10,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"custom_home.php","meta":{"_themeisle_gutenberg_block_has_review":false,"footnotes":""},"categories":[],"tags":[],"class_list":["post-59","page","type-page","status-publish","hentry"],"yoast_head":"\nMLE FPGA Developer Zone - FPGA Development<\/title>\n<meta name=\"description\" content=\"MLE FPGA Developer Zone shares our findings and tip in FPGA development and related programming resources for FPGA developers.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/devzone.missinglinkelectronics.com\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"MLE FPGA Developer Zone - FPGA Development\" \/>\n<meta property=\"og:description\" content=\"MLE FPGA Developer Zone shares our findings and tip in FPGA development and related programming resources for FPGA developers.\" \/>\n<meta property=\"og:url\" content=\"https:\/\/devzone.missinglinkelectronics.com\/\" \/>\n<meta property=\"og:site_name\" content=\"MLE Developer Zone\" \/>\n<meta property=\"article:modified_time\" content=\"2024-06-19T09:13:12+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/devzone.missinglinkelectronics.com\/wp-content\/uploads\/2023\/07\/MLE_visual_circuit.png\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Est. reading time\" \/>\n\t<meta name=\"twitter:data1\" content=\"1 minute\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"TechArticle\",\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/#article\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/\"},\"author\":{\"name\":\"Anna Schreiber\",\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/#\\\/schema\\\/person\\\/3a5fb3e900ec94113fa75dbc15d91bfe\"},\"headline\":\"MLE Developer Zone\",\"datePublished\":\"2023-07-10T14:44:19+00:00\",\"dateModified\":\"2024-06-19T09:13:12+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/\"},\"wordCount\":103,\"image\":{\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/wp-content\\\/uploads\\\/2023\\\/07\\\/MLE_visual_circuit.png\",\"inLanguage\":\"en-US\"},{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/\",\"url\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/\",\"name\":\"MLE FPGA Developer Zone - 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