{"id":59,"date":"2023-07-10T07:44:19","date_gmt":"2023-07-10T14:44:19","guid":{"rendered":"https:\/\/www.missinglinkelectronics.com\/devzone\/?page_id=59"},"modified":"2026-09-14T02:18:01","modified_gmt":"2026-09-14T09:18:01","slug":"home","status":"publish","type":"page","link":"https:\/\/www.missinglinkelectronics.com\/devzone\/","title":{"rendered":"MLE Developer Zone"},"content":{"rendered":"\n

Welcome to MLE FPGA Developer Zone<\/strong><\/p>\n\n\n\n

Here you can step into MLE’s technology features and insiders for FPGA development.
Learn more about how MLE can make things work!<\/p>\n\n\n\n

<\/div>\n\n\n\n
\n
\n

NPAP Datasheet<\/strong><\/a><\/p>\n\n\n\n

Application Notes<\/a><\/strong><\/p>\n\n\n\n

Corundum FPGA NIC<\/a><\/strong><\/p>\n\n\n\n

Linux Cross Reference<\/a><\/strong><\/p>\n<\/div>\n\n\n\n

\n

MLE TCP\/UDP\/IPv4 Accelerators’ technical specifications, architecture, and implementation choices.<\/p>\n\n\n\n

Collection of MLE’s Application Notes and Technical Briefings.<\/p>\n\n\n\n

Downloads for the Corundum FPGA NIC project.<\/p>\n\n\n\n

MLE provides its own Linux Cross Referencer.<\/p>\n<\/div>\n<\/div>\n\n\n\n

If you own a device or subsystem from MLE you will see the following numbers:<\/p>\n\n\n\n

\n
\n
vendor ID for PCIe devices<\/td>0x22db<\/td><\/tr>
vendor ID for IEEE Mac Adresses<\/td>8C-1F-64-47-Ax-xx (0-00 to F-FF)<\/td><\/tr><\/tbody><\/table><\/figure>\n<\/div>\n<\/div>\n\n\n\n
\"MLE<\/figure>\n\n\n\n
<\/div>\n\n\n\n

Privacy Policy<\/a> | Terms & Conditions<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

Welcome to MLE FPGA Developer Zone Here you can step into MLE’s technology features and insiders for FPGA development.Learn more about how MLE can make things work! NPAP Datasheet Application Notes Corundum FPGA NIC Linux Cross Reference MLE TCP\/UDP\/IPv4 Accelerators’ technical specifications, architecture, and implementation choices. Collection of MLE’s Application Notes and Technical Briefings. Downloads<\/p>\n

Read More<\/a><\/p>\n","protected":false},"author":10,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"custom_home.php","meta":{"_themeisle_gutenberg_block_has_review":false,"footnotes":""},"categories":[],"tags":[],"class_list":["post-59","page","type-page","status-publish","hentry"],"yoast_head":"\nMLE FPGA Developer Zone - FPGA Development<\/title>\n<meta name=\"description\" content=\"MLE FPGA Developer Zone shares our findings and tip in FPGA development and related programming resources for FPGA developers.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.missinglinkelectronics.com\/devzone\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"MLE FPGA Developer Zone - FPGA Development\" \/>\n<meta property=\"og:description\" content=\"MLE FPGA Developer Zone shares our findings and tip in FPGA development and related programming resources for FPGA developers.\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.missinglinkelectronics.com\/devzone\/\" \/>\n<meta property=\"og:site_name\" content=\"MLE Developer Zone\" \/>\n<meta property=\"article:modified_time\" content=\"2026-09-14T09:18:01+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-content\/uploads\/2023\/07\/MLE_visual_circuit.png\" \/>\n\t<meta property=\"og:image:width\" content=\"927\" \/>\n\t<meta property=\"og:image:height\" content=\"298\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/png\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Est. reading time\" \/>\n\t<meta name=\"twitter:data1\" content=\"1 minute\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"TechArticle\",\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/#article\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/\"},\"author\":{\"name\":\"Anna Schreiber\",\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/#\\\/schema\\\/person\\\/3a5fb3e900ec94113fa75dbc15d91bfe\"},\"headline\":\"MLE Developer Zone\",\"datePublished\":\"2023-07-10T14:44:19+00:00\",\"dateModified\":\"2026-09-14T09:18:01+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/\"},\"wordCount\":116,\"image\":{\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/wp-content\\\/uploads\\\/2023\\\/07\\\/MLE_visual_circuit.png\",\"inLanguage\":\"en-US\"},{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/\",\"url\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/\",\"name\":\"MLE FPGA Developer Zone - FPGA Development\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/#primaryimage\"},\"image\":{\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/wp-content\\\/uploads\\\/2023\\\/07\\\/MLE_visual_circuit.png\",\"datePublished\":\"2023-07-10T14:44:19+00:00\",\"dateModified\":\"2026-09-14T09:18:01+00:00\",\"description\":\"MLE FPGA Developer Zone shares our findings and tip in FPGA development and related programming resources for FPGA developers.\",\"breadcrumb\":{\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/#breadcrumb\"},\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/\"]}]},{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/#primaryimage\",\"url\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/wp-content\\\/uploads\\\/2023\\\/07\\\/MLE_visual_circuit.png\",\"contentUrl\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/wp-content\\\/uploads\\\/2023\\\/07\\\/MLE_visual_circuit.png\",\"width\":927,\"height\":298},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"MLE Developer Zone\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/#website\",\"url\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/\",\"name\":\"MLE Developer Zone\",\"description\":\"Missing Link Electronics MLE Developer Zone and FPGA Application Notes\",\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"en-US\"},{\"@type\":\"Person\",\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/#\\\/schema\\\/person\\\/3a5fb3e900ec94113fa75dbc15d91bfe\",\"name\":\"Anna Schreiber\"}]}<\/script>\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"MLE FPGA Developer Zone - FPGA Development","description":"MLE FPGA Developer Zone shares our findings and tip in FPGA development and related programming resources for FPGA developers.","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/www.missinglinkelectronics.com\/devzone\/","og_locale":"en_US","og_type":"article","og_title":"MLE FPGA Developer Zone - FPGA Development","og_description":"MLE FPGA Developer Zone shares our findings and tip in FPGA development and related programming resources for FPGA developers.","og_url":"https:\/\/www.missinglinkelectronics.com\/devzone\/","og_site_name":"MLE Developer Zone","article_modified_time":"2026-09-14T09:18:01+00:00","og_image":[{"width":927,"height":298,"url":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-content\/uploads\/2023\/07\/MLE_visual_circuit.png","type":"image\/png"}],"twitter_card":"summary_large_image","twitter_misc":{"Est. reading time":"1 minute"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"TechArticle","@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/#article","isPartOf":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/"},"author":{"name":"Anna Schreiber","@id":"https:\/\/devzone.missinglinkelectronics.com\/#\/schema\/person\/3a5fb3e900ec94113fa75dbc15d91bfe"},"headline":"MLE Developer Zone","datePublished":"2023-07-10T14:44:19+00:00","dateModified":"2026-09-14T09:18:01+00:00","mainEntityOfPage":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/"},"wordCount":116,"image":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/#primaryimage"},"thumbnailUrl":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-content\/uploads\/2023\/07\/MLE_visual_circuit.png","inLanguage":"en-US"},{"@type":"WebPage","@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/","url":"https:\/\/www.missinglinkelectronics.com\/devzone\/","name":"MLE FPGA Developer Zone - FPGA Development","isPartOf":{"@id":"https:\/\/devzone.missinglinkelectronics.com\/#website"},"primaryImageOfPage":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/#primaryimage"},"image":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/#primaryimage"},"thumbnailUrl":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-content\/uploads\/2023\/07\/MLE_visual_circuit.png","datePublished":"2023-07-10T14:44:19+00:00","dateModified":"2026-09-14T09:18:01+00:00","description":"MLE FPGA Developer Zone shares our findings and tip in FPGA development and related programming resources for FPGA developers.","breadcrumb":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/#breadcrumb"},"inLanguage":"en-US","potentialAction":[{"@type":"ReadAction","target":["https:\/\/www.missinglinkelectronics.com\/devzone\/"]}]},{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/#primaryimage","url":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-content\/uploads\/2023\/07\/MLE_visual_circuit.png","contentUrl":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-content\/uploads\/2023\/07\/MLE_visual_circuit.png","width":927,"height":298},{"@type":"BreadcrumbList","@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/www.missinglinkelectronics.com\/devzone\/"},{"@type":"ListItem","position":2,"name":"MLE Developer Zone"}]},{"@type":"WebSite","@id":"https:\/\/devzone.missinglinkelectronics.com\/#website","url":"https:\/\/devzone.missinglinkelectronics.com\/","name":"MLE Developer Zone","description":"Missing Link Electronics MLE Developer Zone and FPGA Application Notes","potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/devzone.missinglinkelectronics.com\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"en-US"},{"@type":"Person","@id":"https:\/\/devzone.missinglinkelectronics.com\/#\/schema\/person\/3a5fb3e900ec94113fa75dbc15d91bfe","name":"Anna Schreiber"}]}},"_links":{"self":[{"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/pages\/59","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/users\/10"}],"replies":[{"embeddable":true,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/comments?post=59"}],"version-history":[{"count":1,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/pages\/59\/revisions"}],"predecessor-version":[{"id":8801,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/pages\/59\/revisions\/8801"}],"wp:attachment":[{"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/media?parent=59"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/categories?post=59"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/tags?post=59"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}