{"id":7931,"date":"2026-08-10T06:46:40","date_gmt":"2026-08-10T13:46:40","guid":{"rendered":"https:\/\/www.missinglinkelectronics.com\/devzone\/?p=7931"},"modified":"2026-09-07T05:24:07","modified_gmt":"2026-09-07T12:24:07","slug":"npap-dataflow-block-diagram","status":"publish","type":"post","link":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/","title":{"rendered":"Dataflow Block Diagram"},"content":{"rendered":"MLE NPAP Dataflow Block Diagram The following shows the dataflow view of an exemplary design integrating MLE NPAP with one UDP core and multiple TCP cores (3 for user-level plus 2 for Netperf), each with an example user application, plus Netperf (for bandwidth and latency benchmarking), plus network impairment (for Bit Error Rate Testing), plus diagnostics counters: The example user applications serve as an example on how to send and\/or receive data from programmable logic via TCP\/UDP\/IPv4. For TCP this logic is inside one (or more) TCP Wrappers which contain HDL code for handling the control and data flow: TCA &#8211; the TCP Command Application to open\/close a TCP connection TDA &#8211; the TCP Demo Application which uses the TCA to control the TCP session and can forward data to and from external applications such as the DGC DGC &#8211; a Data Generator and Checker which can generate payload data for sending and at the same time can check received payload data Similarly, for UDP this logic is inside the one (or more) UDP Wrappers which contain HDL code for handling the control and data flow: UDA &#8211; the UDP Demo Application which handles the control and data flow for one UDP port&nbsp; DGC &#8211; a Data Generator and Checker which can<p class=\"more-link\"><a href=\"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/\" class=\"themebutton\">Read More<\/a><\/p>","protected":false},"excerpt":{"rendered":"<p>MLE NPAP Dataflow Block Diagram The following shows the dataflow view of an exemplary design integrating MLE NPAP with one UDP core and multiple TCP cores (3 for user-level plus 2 for Netperf), each with an example user application, plus Netperf (for bandwidth and latency benchmarking), plus network impairment (for Bit Error Rate Testing), plus<\/p>\n<p class=\"more-link\"><a href=\"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/\" class=\"themebutton\">Read More<\/a><\/p>\n","protected":false},"author":5,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_themeisle_gutenberg_block_has_review":false,"footnotes":""},"categories":[163,164],"tags":[],"class_list":["post-7931","post","type-post","status-publish","format-standard","hentry","category-datasheet","category-npap_datasheet"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v28.4 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>Dataflow Block Diagram - MLE Developer Zone<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Dataflow Block Diagram - MLE Developer Zone\" \/>\n<meta property=\"og:description\" content=\"MLE NPAP Dataflow Block Diagram The following shows the dataflow view of an exemplary design integrating MLE NPAP with one UDP core and multiple TCP cores (3 for user-level plus 2 for Netperf), each with an example user application, plus Netperf (for bandwidth and latency benchmarking), plus network impairment (for Bit Error Rate Testing), plusRead More\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/\" \/>\n<meta property=\"og:site_name\" content=\"MLE Developer Zone\" \/>\n<meta property=\"article:published_time\" content=\"2026-08-10T13:46:40+00:00\" \/>\n<meta property=\"article:modified_time\" content=\"2026-09-07T12:24:07+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-content\/uploads\/2026\/08\/MLE-TCP-IP-NPAP-Block-Diagram-Dataflow-fully-loaded.png\" \/>\n<meta name=\"author\" content=\"Yi-Ying Li\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Written by\" \/>\n\t<meta name=\"twitter:data1\" content=\"Yi-Ying Li\" \/>\n\t<meta name=\"twitter:label2\" content=\"Est. reading time\" \/>\n\t<meta name=\"twitter:data2\" content=\"12 minutes\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"TechArticle\",\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/datasheet\\\/npap_datasheet\\\/npap-dataflow-block-diagram\\\/#article\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/datasheet\\\/npap_datasheet\\\/npap-dataflow-block-diagram\\\/\"},\"author\":{\"name\":\"Yi-Ying Li\",\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/#\\\/schema\\\/person\\\/5767b9d4c5bd6c8a13078612212c518b\"},\"headline\":\"Dataflow Block Diagram\",\"datePublished\":\"2026-08-10T13:46:40+00:00\",\"dateModified\":\"2026-09-07T12:24:07+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/datasheet\\\/npap_datasheet\\\/npap-dataflow-block-diagram\\\/\"},\"wordCount\":456,\"image\":{\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/datasheet\\\/npap_datasheet\\\/npap-dataflow-block-diagram\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/wp-content\\\/uploads\\\/2026\\\/08\\\/MLE-TCP-IP-NPAP-Block-Diagram-Dataflow-fully-loaded.png\",\"articleSection\":[\"Datasheet\",\"NPAP Datasheet\"],\"inLanguage\":\"en-US\"},{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/datasheet\\\/npap_datasheet\\\/npap-dataflow-block-diagram\\\/\",\"url\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/datasheet\\\/npap_datasheet\\\/npap-dataflow-block-diagram\\\/\",\"name\":\"Dataflow Block Diagram - MLE Developer Zone\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/datasheet\\\/npap_datasheet\\\/npap-dataflow-block-diagram\\\/#primaryimage\"},\"image\":{\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/datasheet\\\/npap_datasheet\\\/npap-dataflow-block-diagram\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/wp-content\\\/uploads\\\/2026\\\/08\\\/MLE-TCP-IP-NPAP-Block-Diagram-Dataflow-fully-loaded.png\",\"datePublished\":\"2026-08-10T13:46:40+00:00\",\"dateModified\":\"2026-09-07T12:24:07+00:00\",\"author\":{\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/#\\\/schema\\\/person\\\/5767b9d4c5bd6c8a13078612212c518b\"},\"breadcrumb\":{\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/datasheet\\\/npap_datasheet\\\/npap-dataflow-block-diagram\\\/#breadcrumb\"},\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/datasheet\\\/npap_datasheet\\\/npap-dataflow-block-diagram\\\/\"]}]},{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/datasheet\\\/npap_datasheet\\\/npap-dataflow-block-diagram\\\/#primaryimage\",\"url\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/wp-content\\\/uploads\\\/2026\\\/08\\\/MLE-TCP-IP-NPAP-Block-Diagram-Dataflow-fully-loaded.png\",\"contentUrl\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/wp-content\\\/uploads\\\/2026\\\/08\\\/MLE-TCP-IP-NPAP-Block-Diagram-Dataflow-fully-loaded.png\",\"width\":797,\"height\":716,\"caption\":\"MLE TCP IP NPAP Block Diagram Dataflow (fully loaded)\"},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\\\/\\\/www.missinglinkelectronics.com\\\/devzone\\\/datasheet\\\/npap_datasheet\\\/npap-dataflow-block-diagram\\\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"Dataflow Block Diagram\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/#website\",\"url\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/\",\"name\":\"MLE Developer Zone\",\"description\":\"Missing Link Electronics MLE Developer Zone and FPGA Application Notes\",\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"en-US\"},{\"@type\":\"Person\",\"@id\":\"https:\\\/\\\/devzone.missinglinkelectronics.com\\\/#\\\/schema\\\/person\\\/5767b9d4c5bd6c8a13078612212c518b\",\"name\":\"Yi-Ying Li\"}]}<\/script>\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"Dataflow Block Diagram - MLE Developer Zone","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/","og_locale":"en_US","og_type":"article","og_title":"Dataflow Block Diagram - MLE Developer Zone","og_description":"MLE NPAP Dataflow Block Diagram The following shows the dataflow view of an exemplary design integrating MLE NPAP with one UDP core and multiple TCP cores (3 for user-level plus 2 for Netperf), each with an example user application, plus Netperf (for bandwidth and latency benchmarking), plus network impairment (for Bit Error Rate Testing), plusRead More","og_url":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/","og_site_name":"MLE Developer Zone","article_published_time":"2026-08-10T13:46:40+00:00","article_modified_time":"2026-09-07T12:24:07+00:00","og_image":[{"url":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-content\/uploads\/2026\/08\/MLE-TCP-IP-NPAP-Block-Diagram-Dataflow-fully-loaded.png","type":"","width":"","height":""}],"author":"Yi-Ying Li","twitter_card":"summary_large_image","twitter_misc":{"Written by":"Yi-Ying Li","Est. reading time":"12 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"TechArticle","@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/#article","isPartOf":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/"},"author":{"name":"Yi-Ying Li","@id":"https:\/\/devzone.missinglinkelectronics.com\/#\/schema\/person\/5767b9d4c5bd6c8a13078612212c518b"},"headline":"Dataflow Block Diagram","datePublished":"2026-08-10T13:46:40+00:00","dateModified":"2026-09-07T12:24:07+00:00","mainEntityOfPage":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/"},"wordCount":456,"image":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/#primaryimage"},"thumbnailUrl":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-content\/uploads\/2026\/08\/MLE-TCP-IP-NPAP-Block-Diagram-Dataflow-fully-loaded.png","articleSection":["Datasheet","NPAP Datasheet"],"inLanguage":"en-US"},{"@type":"WebPage","@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/","url":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/","name":"Dataflow Block Diagram - MLE Developer Zone","isPartOf":{"@id":"https:\/\/devzone.missinglinkelectronics.com\/#website"},"primaryImageOfPage":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/#primaryimage"},"image":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/#primaryimage"},"thumbnailUrl":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-content\/uploads\/2026\/08\/MLE-TCP-IP-NPAP-Block-Diagram-Dataflow-fully-loaded.png","datePublished":"2026-08-10T13:46:40+00:00","dateModified":"2026-09-07T12:24:07+00:00","author":{"@id":"https:\/\/devzone.missinglinkelectronics.com\/#\/schema\/person\/5767b9d4c5bd6c8a13078612212c518b"},"breadcrumb":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/#breadcrumb"},"inLanguage":"en-US","potentialAction":[{"@type":"ReadAction","target":["https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/"]}]},{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/#primaryimage","url":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-content\/uploads\/2026\/08\/MLE-TCP-IP-NPAP-Block-Diagram-Dataflow-fully-loaded.png","contentUrl":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-content\/uploads\/2026\/08\/MLE-TCP-IP-NPAP-Block-Diagram-Dataflow-fully-loaded.png","width":797,"height":716,"caption":"MLE TCP IP NPAP Block Diagram Dataflow (fully loaded)"},{"@type":"BreadcrumbList","@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-dataflow-block-diagram\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/devzone.missinglinkelectronics.com\/"},{"@type":"ListItem","position":2,"name":"Dataflow Block Diagram"}]},{"@type":"WebSite","@id":"https:\/\/devzone.missinglinkelectronics.com\/#website","url":"https:\/\/devzone.missinglinkelectronics.com\/","name":"MLE Developer Zone","description":"Missing Link Electronics MLE Developer Zone and FPGA Application Notes","potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/devzone.missinglinkelectronics.com\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"en-US"},{"@type":"Person","@id":"https:\/\/devzone.missinglinkelectronics.com\/#\/schema\/person\/5767b9d4c5bd6c8a13078612212c518b","name":"Yi-Ying Li"}]}},"_links":{"self":[{"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/posts\/7931","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/users\/5"}],"replies":[{"embeddable":true,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/comments?post=7931"}],"version-history":[{"count":13,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/posts\/7931\/revisions"}],"predecessor-version":[{"id":8739,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/posts\/7931\/revisions\/8739"}],"wp:attachment":[{"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/media?parent=7931"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/categories?post=7931"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/tags?post=7931"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}