{"id":7983,"date":"2026-08-10T06:54:32","date_gmt":"2026-08-10T13:54:32","guid":{"rendered":"https:\/\/www.missinglinkelectronics.com\/devzone\/?p=7983"},"modified":"2026-09-07T05:21:10","modified_gmt":"2026-09-07T12:21:10","slug":"npap-ip-core-deliverables","status":"publish","type":"post","link":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-ip-core-deliverables\/","title":{"rendered":"IP-Core Deliverables"},"content":{"rendered":"MLE NPAP IP-Core Deliverables MLE NPAP deliverables include IEEE 1685 IP-XACT packages which include NPAP Kernel plus NPAP Support IP blocks plus non-IP-XACT FPGA reference design projects. The following design blocks are part of a typical delivery package: Low-Latency Ethernet MAC for 10G\/25G NPAP Kernel with IPv4, TCP, UDP NPAP Support IP Data Generator Checker(great for system-level testing and for performance tuning) TCP Command Application TCP Demo Application UDP Demo Application Netperf Control Application Hardware Abstraction Layer (HAL) python package Network Statistics and Diagnostics (optional) Network Impairment and Bit Error Insertion (optional) Evaluation Reference Design (as FPGA Design Project Archive) Next: NPAP Developer Documentation<p class=\"more-link\"><a href=\"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-ip-core-deliverables\/\" class=\"themebutton\">Read More<\/a><\/p>","protected":false},"excerpt":{"rendered":"<p>MLE NPAP IP-Core Deliverables MLE NPAP deliverables include IEEE 1685 IP-XACT packages which include NPAP Kernel plus NPAP Support IP blocks plus non-IP-XACT FPGA reference design projects. The following design blocks are part of a typical delivery package:Read More<\/p>\n","protected":false},"author":5,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_themeisle_gutenberg_block_has_review":false,"footnotes":""},"categories":[163,164],"tags":[],"class_list":["post-7983","post","type-post","status-publish","format-standard","hentry","category-datasheet","category-npap_datasheet"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v28.4 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>IP-Core Deliverables - MLE Developer Zone<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-ip-core-deliverables\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"IP-Core Deliverables - MLE Developer Zone\" \/>\n<meta property=\"og:description\" content=\"MLE NPAP IP-Core Deliverables MLE NPAP deliverables include IEEE 1685 IP-XACT packages which include NPAP Kernel plus NPAP Support IP blocks plus non-IP-XACT FPGA reference design projects. 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The following design blocks are part of a typical delivery package:Read More","og_url":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-ip-core-deliverables\/","og_site_name":"MLE Developer Zone","article_published_time":"2026-08-10T13:54:32+00:00","article_modified_time":"2026-09-07T12:21:10+00:00","author":"Yi-Ying Li","twitter_card":"summary_large_image","twitter_misc":{"Written by":"Yi-Ying Li","Est. reading time":"1 minute"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"TechArticle","@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-ip-core-deliverables\/#article","isPartOf":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-ip-core-deliverables\/"},"author":{"name":"Yi-Ying Li","@id":"https:\/\/devzone.missinglinkelectronics.com\/#\/schema\/person\/5767b9d4c5bd6c8a13078612212c518b"},"headline":"IP-Core Deliverables","datePublished":"2026-08-10T13:54:32+00:00","dateModified":"2026-09-07T12:21:10+00:00","mainEntityOfPage":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-ip-core-deliverables\/"},"wordCount":115,"articleSection":["Datasheet","NPAP Datasheet"],"inLanguage":"en-US"},{"@type":"WebPage","@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-ip-core-deliverables\/","url":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-ip-core-deliverables\/","name":"IP-Core Deliverables - MLE Developer Zone","isPartOf":{"@id":"https:\/\/devzone.missinglinkelectronics.com\/#website"},"datePublished":"2026-08-10T13:54:32+00:00","dateModified":"2026-09-07T12:21:10+00:00","author":{"@id":"https:\/\/devzone.missinglinkelectronics.com\/#\/schema\/person\/5767b9d4c5bd6c8a13078612212c518b"},"breadcrumb":{"@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-ip-core-deliverables\/#breadcrumb"},"inLanguage":"en-US","potentialAction":[{"@type":"ReadAction","target":["https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-ip-core-deliverables\/"]}]},{"@type":"BreadcrumbList","@id":"https:\/\/www.missinglinkelectronics.com\/devzone\/datasheet\/npap_datasheet\/npap-ip-core-deliverables\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/devzone.missinglinkelectronics.com\/"},{"@type":"ListItem","position":2,"name":"IP-Core Deliverables"}]},{"@type":"WebSite","@id":"https:\/\/devzone.missinglinkelectronics.com\/#website","url":"https:\/\/devzone.missinglinkelectronics.com\/","name":"MLE Developer Zone","description":"Missing Link Electronics MLE Developer Zone and FPGA Application Notes","potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/devzone.missinglinkelectronics.com\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"en-US"},{"@type":"Person","@id":"https:\/\/devzone.missinglinkelectronics.com\/#\/schema\/person\/5767b9d4c5bd6c8a13078612212c518b","name":"Yi-Ying Li"}]}},"_links":{"self":[{"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/posts\/7983","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/users\/5"}],"replies":[{"embeddable":true,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/comments?post=7983"}],"version-history":[{"count":9,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/posts\/7983\/revisions"}],"predecessor-version":[{"id":8735,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/posts\/7983\/revisions\/8735"}],"wp:attachment":[{"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/media?parent=7983"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/categories?post=7983"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.missinglinkelectronics.com\/devzone\/wp-json\/wp\/v2\/tags?post=7983"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}