Xilinx Adapt EMEA: Automotive, May 18-19, 2021

MLE will present "Zone-Based Architectures with Auto/TSN on Zynq UltraScale+ MPSoC" at the Xilinx Adapt EMEA: Automotive. This is organized as a Virtual Technical Event in the mornings of May 18-19, 2021.


 

PCI-SIG Virtual Developers Conference 2021

As as sponsor and as a presenter of "Zone-Based Automotive Backbones Tunneling PCIe" MLE cordially invites you to join the PCI-SIG Virtual Developers Conference 2021. Registration for this widely received event will start May 4th.


Algoblu partners with MLE on FPGA-Based Network Element Virtualization

Algoblu announced today its Network Element Virtualization (NEV) platform that virtualizes and orchestrates underlying network resources to help carriers offer more application-oriented customized services to both commercial and residential customers. Thanks to the new FPGA-based technology, the cost per bit decreases by more than four times and operation efficiency increases three times.

“We are pleased to collaborate with Algoblu to develop a Network Element Virtualization chip built on leading-edge FPGA technology. The chip is key to Algoblu's NEV architecture with an FPGA-based SMartNIC, all developed in an elegant way,” says Dr. Endric Schubert, CTO at Missing Link Electronics.


 

MLE joins PCI-SIG Automotive Workgroup

PCI Express (PCIe) has significant advantages which help to drive innovation towards more eco-friendly and safer vehicles. MLE is a member of PCI-SIG and has been providing technology and solutions for PCIe-based Long-Range Tunneling used for automotive backbone connectivity and is proud to volunteer for PCI-SIG's newly formed Automotive Workgroup.


 

Deterministic Networking with TSN-10/25/50/100G

MLE presents "Deterministic Networking with TCP-TSN-Cores for 10/25/50/100 Gigabit Ethernet" in Technical Brief MLE-TB20201203. Please read here.


 

US Patent 10,848,442 for Secure Heterogeneous Packet-Based Transport

Missing Link Electronics has been awarded US Patent 10,848,442 on Heterogeneous Packet-Based Transport which covers aspects of secure tunneling packets such as PCI Express (PCIe) Transaction-Layer Packets (TLP) over reliable TCP/IP over 1/10/25/50/100G Ethernet. This extends the range of PCIe and enables building distributed systems based on PCIe.

 


 

FPGA-Based Recording to NVMe SSDs

MLE publishes Technical Brief MLE-TB20201012 "Sustained, High-Speed Data Recording with NVMe SSDs" discussing read/write performance aspects of various NVMe SSDs. Please read here.


 

MLE presents at 4th Workshop "Programmable Processing for the Autonomous / Connected Vehicle"

MLE presents "PCIe-over-TCP-over-TSN-over10/25GigE" at the 4th Workshop "Programmable Processing for the Autonomous / Connected Vehicle". 

This workshop was hosted by Technische Hochschule Ulm (THU) on September 24, 2020.

Click here to see the slides of the presentation.


 

MLE Updates NVMe Streamer

MLE updates NVMe Streamer a so-called Full Accelerator NVMe host subsystem integrated into Xilinx FPGAs. This update covers new NVMe SSD features such as changes in default page size and performance enhancements to support maximum bandwidth for modern PCIe Gen3 x4 m.2 SSD.


 

US Patent 10,708,199 for Heterogeneous Packet-Based Transport

Missing Link Electronics has been awarded US Patent 10,708,199 on Heterogeneous Packet-Based Transport which covers aspects of tunneling packets such as PCI Express (PCIe) Transaction-Layer Packets (TLP) over reliable TCP/IP over 1/10/25/50/100G Ethernet. This extends the range of PCIe and enables building distributed systems based on PCIe.