Today, FPGA design is far more than implementing glue logic. With the complexity of today's FPGA devices it becomes cost-efficient to implement programmable system-on-chip solutions with multiple processor cores, heterogeneous accelerators and peripheral blocks interfacing with multi-gigabit transceivers, for example. Therefore, a successful FPGA project demands a holistic approach and dependable relationships with 3rd party IP core vendors and close collaboration with the FPGA vendors.
As a Certified Xilinx Alliance Partner many of our FPGA design engineers have certified their expertise in
- Xilinx PetaLinux on Micro-Blaze and Zynq
- Xilinx Zynq-7000 All-Programmable SoC
- Xilinx Zynq UltraScale+ MPSoC
- Xilinx GTP/GTX/GTH/GTY transceiver parameterization and instantiation
- Xilinx ISE design flow with XPS and ChipScope Design Analysis
- Xilinx Vivado design flow following Xilinx UltraFast Design Methodology
- Xilinx Vivado High-Level-Synthesis using C/C++/SystemC design entry
Xilinx trusts our team with maintenance and service of the XPS USB 2.0 EHCI host controller soft IP core and with PetaLinux (2014.2 up to current) development support for MicroBlaze and Zynq. Our equipment includes licenses for Xilinx ISE (version 10.1 up to current), Xilinx Vivado and Vivado HLS (2013.3 up to current).
MLE is a member of Altera's Design Service Network and supports customers with
- Altera Quartus-II with SOPC-Builder and SignalTap Design Analysis
- Altera Video-IP (VIP) Library
- Altera NIOS-II Embedded Design Suite
In the past we have done FPGA and CPLD design work for devices from Lattice Semi and Microsemi, as well.