FPGA DevTips
Here we collect the difficulties we discovered during the FPGA development process and share our methodologies and techniques to solve them.
Network Acceleration
A Simple Trick to Increase Your PCIe Bandwidth on AMD FPGAs
A Simple Trick to Increase Your PCIe Bandwidth on AMD FPGAs Our Mission: If It Is Packets, We Make It…
Testdrive the Future of Networking: Evaluate MLE’s FPGA-Powered TCP/IP Stack in the Cloud!
Testdrive The Future of Networking: Evaluate MLE’s FPGA-Powered TCP/IP Stack in the Cloud! Our Mission: If It Is Packets, We…
Storage Acceleration
A Deep Dive into AMD/Xilinx AXI Bridge for PCI Express (AMD/Xilinx PG194) and Why We Tweaked C_M_AXI_NUM_READQ
A Deep Dive into AMD/Xilinx AXI Bridge for PCI Express (AMD/Xilinx PG194) and Why We Tweaked C_M_AXI_NUM_READQ Executive Summary AMD/Xilinx’…
Picking The Right Granularity When Buffering PCIe/NVMe Data
Picking The Right Granularity When Buffering PCIe/NVMe Data Non-Volatile Memory Express (NVMe) is an interface specification often used with PCIe.…
Lab Setups
Measuring Power Consumption of Add-In FPGA Cards Can Be Easy
Measuring Power Consumption of Add-In FPGA Cards Can Be Easy Our Mission: If It Is Packets, We Make It Go…
An Easy Approach to Cool High-Performance FPGA Beasts in Lab Setups
An Easy Approach to Cool High-Performance FPGA Beasts in Lab Setups Our Mission: If It Is Packets, We Make It…