Hybrid Acceleration with MLE NPAP
Hybrid acceleration refers to the concept of combining full acceleration with an on-chip Network Interface Card (NIC). This NIC processes ingress network traffic in FPGA logic and then copies the network traffic via DMA to a host CPU where it is processed via the Linux TCP/UDP/IPv4 protocol stack (and vice versa for egress network traffic).
Hybrid acceleration can give you the best of both worlds: MLE NPAP as the Full Accelerator takes care of certain TCP connections where high throughput and/or low, deterministic latency is important while many, many other TCP connections are processed via the standard software protocol stack without consuming chip resources.
Because TCP does so-called fair bandwidth sharing (please refer to RFC2914, RFC5166 and RFC8312) Hybrid Acceleration allow for clever trade-offs between performance (as in throughput and latency) over FPGA resource usage for many TCP/IPv4 connections. For example, if you run many TCP connections over one single 100 GigE link, you may want full acceleration for, say, up to 20 TCP connections: When 3 TCP connections are open, then each one gets 33 Gbps bandwidth which clearly needs MLE NPAP as a Full Accelerator. But for moments, when 2000 TCP connections are open, then each TCP connection gets 50 Mbps bandwidth, so you can run most of them un-accelerated, in software. Obviously, this needs an architectural decision. Just contact Team MLE for help!
At MLE for the FPGA-based NIC we have been using (and contributing to) the Corundum project: http://corundum.io
Corundum is an open-source, high-performance FPGA-based NIC and platform for In-Network Compute. Features include a high performance datapath, 10G/25G/50G/100G Ethernet, PCIe connectivity to the host, a custom, high performance, tightly-integrated PCIe DMA engine, many (1000+) transmit, receive, completion, and event queues, scatter/gather DMA, MSI, multiple interfaces, multiple ports per interface, per-port transmit scheduling including high precision TDMA, flow hashing, RSS, checksum offloading, and native IEEE 1588 PTP timestamping. A Linux driver is included that integrates with the Linux networking stack. Development and debugging is facilitated by an extensive simulation framework that covers the entire system from a simulation model of the driver and PCI express interface on one side to the Ethernet interfaces on the other side (https://docs.corundum.io/en/latest/contents.html).
One of the key advantages of the Corundum architecture is support for In-Network Processing inside the FPGA logic, shown as “App” in the block diagram:
These Corundum “Apps” can serve as a “turbo”, and one of those turbos can be MLE NPAP!