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    MLE NPAP Resource Estimates for FPGA

    Table of Contents

    Resource estimates are directly tied to the specific set of compile-time parameters: Therefore, a typical FPGA implementation which integrates MLE NPAP can range from as low as 10K LUTs to 1 million LUTs (for dozens of TCP cores).

    MLE NPAP for AMD Versal AI Edge

    The following table shows resources for AMD/Xilinx Versal AI Edge Series fabric (xcve2302-sfva784-1LP-e-S-es1) compiled with AMD/Xilinx Vivado/Vitis 2024.1 – instantiating the following design features:

    • Ethernet block
    • IPv4 block
    • 1 UDP block
    • 4 instances of TCP blocks
    • Diagnostics blocks
    Instance Hierarchy LUTs LUTRAMs SRLs FFs RAMB36 RAMB18 URAM DSP
    Total Logic Blocks
    npap_tcp_udp_wrapper_u0 709446901019142062052251704
    └─npap_tcp_udp_top_u0 709446901019142062052251704
    ├─axis_register_udp_u0 228228004300000
    ├─axis_register_udp_u1 292292004310000
    ├─gen_hhi_to_axis_adapter 121412140019780000
    ├─npap_configuration_block_u0 103103003390000
    ├─npap_priority_manager_configurati 292900430000
    ├─npap_visibility_block 95009480020133240000
    ├─npap_diag_capture_u0 82978277020125110000
    ├─(npap_diag_capture_u0) 46260206940000
    ├─npap_diag_control_eth 157157002780000
    ├─npap_diag_control_ipv4 157157002780000
    ├─npap_diag_control_tcp 157157002030000
    ├─npap_diag_control_udp 157157002780000
    ├─npap_diag_counter_tcp_loop[0] 180318030026950000
    ├─npap_diag_counter_tcp_loop[1] 196119610026950000
    ├─npap_diag_counter_tcp_loop[2] 193619360026950000
    └─npap_diag_counter_tcp_loop[3] 192319230026950000
    └─npap_diag_register_u0 12041204008130000
    ├─(npap_diag_register_u0) 8098090000000
    ├─npap_diag_register_ethernet_u 11001900000
    ├─npap_diag_register_ipv4_u0 11001890000
    ├─npap_diag_register_tcp_u0 393393002450000
    └─npap_diag_register_udp_u0 11001890000
    └─wrapper_ll_ip_tcp_u0 59583576691914045507251704
    ├─(wrapper_ll_ip_tcp_u0) 633633007650000
    ├─g0.i_tcpTxMux 000020000
    ├─gen_WithUdp.i_udp 486448640042655080
    ├─gen_tcpConnections[0].i_tcp 12007115734340883040171
    ├─gen_tcpConnections[1].i_tcp 11174107644100836510111
    ├─gen_tcpConnections[2].i_tcp 12007115734360884640171
    ├─gen_tcpConnections[3].i_tcp 12011115754360893140171
    ├─iBusScheduler8 53153100360000
    ├─i_internetLayer 33833265118031080000
    ├─i_networkLayer 2947286780024047100
    └─i_resetStretchStack 545400450000

    MLE NPAP for AMD/Xilinx Ultrascale+ Series

    The following table shows resources for AMD/Xilinx Zynq Ultrascale+ MPSoC ZU9EG compiled with AMD/Xilinx Vivado 2022.2 – instantiating the following design features:

    • 10 GigE Low-Latency MAC from Fraunhofer HHI
    • Ethernet block
    • IPv4 block
    • UDP block
    • 10 instances of TCP blocks (2 used for netperf)
    • TCP and UDP Diagnostics blocks
    Instance Hierarchy LUTs LUTRAMs SRLs FFs RAMB36 RAMB18 URAM DSP
    Total Logic Blocks
    amd_zcu102_source_full_10g_sync15534715042048241031796547078030
    ├─mac_10_gbe_wrapper_u01789177910010160000
    ├─mac10gbe_top_u01789177910010160000
    └─mac10Gbe_struct_u01789177910010160000
    ├─mac_interface_adapter_generic_64_158158003700000
    ├─axis_dwidth_converter_128_to_64119119002220000
    └─axis_dwidth_converter_64_to_1283939001480000
    ├─reset_stretch_reset_rx_mac5500170000
    ├─reset_stretch_reset_tx_mac5500170000
    ├─reset_sync_reset_system_to_reset_000020000
    └─reset_sync_reset_system_to_reset_000020000
    ├─npap_tcp_udp_wrapper_u010967210504045301021307287076030
    └─npap_tcp_udp_top_u010967210504045301021307287076030
    ├─axis_register_udp_u0102102004280000
    ├─axis_register_udp_u1263263004240000
    ├─npap_configuration_block_u0126126003380000
    ├─npap_priority_manager_conf_515100520000
    ├─npap_visibility_block1149911445054318050000
    ├─npap_diag_capture_u01053910485054309720000
    ├─(npap_diag_capture_u0)1307605414180000
    ├─npap_diag_control_eth137137002030000
    ├─npap_diag_control_ipv4137137002030000
    ├─npap_diag_control_tcp137137002030000
    ├─npap_diag_control_udp8484002030000
    ├─npap_diag_counter_tcp_07607600026950000
    ├─npap_diag_counter_tcp_1101610160026950000
    ├─npap_diag_counter_tcp_2108010800026950000
    ├─npap_diag_counter_tcp_38258250026950000
    ├─npap_diag_counter_tcp_47607600026950000
    ├─npap_diag_counter_tcp_5108010800026950000
    ├─npap_diag_counter_tcp_6101610160026950000
    ├─npap_diag_counter_tcp_78258250026950000
    ├─npap_diag_counter_tcp_88248240026950000
    ├─npap_diag_counter_tcp_9146514650026950000
    └─npap_diag_counter_udp2682680017920000
    └─npap_diag_register_u0960960008330000
    ├─(npap_diag_register_u0)8458450000000
    ├─npap_diag_reg_ethernet11001880000
    ├─npap_diag_register_ipv411001880000
    ├─npap_diag_register_tcp6464002680000
    └─npap_diag_register_udp5050001890000
    └─wrapper_ll_ip_tcp_u09450589927453048922537076030
    ├─(wrapper_ll_ip_tcp_u0)800800001920000
    ├─g0.i_tcpTxMux000040000
    ├─gen_WithUdp.i_udp36203572048388847500
    ├─gen_tcpConnections[0].i_t831478884260817968003
    ├─gen_tcpConnections[1].i_t793675024340778541003
    ├─gen_tcpConnections[2].i_t962291884340840368003
    ├─gen_tcpConnections[3].i_t834179074340828968003
    ├─gen_tcpConnections[4].i_t834079064340829068003
    ├─gen_tcpConnections[5].i_t832779034340828868003
    ├─gen_tcpConnections[6].i_t833178974340828968003
    ├─gen_tcpConnections[7].i_t833378994340828868003
    ├─gen_tcpConnections[8].i_t833879044340830468003
    ├─gen_tcpConnections[9].i_t833779034340828868003
    ├─iBusScheduler81108110800690000
    ├─i_internetLayer24292311118030460000
    ├─i_networkLayer1891181180022767100
    └─i_resetStretchStack474700350000
    • 10 GigE Low-Latency MAC from Fraunhofer HHI
    • Ethernet block
    • IPv4 block
    • UDP block
    • 10 instances of TCP
    Instance Hierarchy LUTs LUTRAMs SRLs FFs RAMB36 RAMB18 URAM DSP
    Total Logic Blocks
    amd_zcu102_source_no_diag_10g_sync1437711388984824491473857078030
    ├─mac_10_gbe_wrapper_u01796178610010160000
    ├─mac10gbe_top_u01796178610010160000
    └─mac10Gbe_struct_u01796178610010160000
    ├─mac_interface_adapter_generic_64_158158003700000
    ├─axis_dwidth_converter_128_to_64119119002220000
    └─axis_dwidth_converter_64_to_1283939001480000
    ├─reset_stretch_reset_rx_mac5500170000
    ├─reset_stretch_reset_tx_mac5500170000
    ├─reset_sync_reset_system_to_reset_000020000
    ├─reset_sync_reset_system_to_reset_000020000
    ├─npap_tcp_udp_wrapper_u09809293514453048985067076030
    ├─npap_tcp_udp_top_u09809293514453048985067076030
    ├─axis_register_udp_u0102102004280000
    ├─axis_register_udp_u1264264004240000
    ├─npap_configuration_block_u0142142003380000
    ├─npap_priority_manager_conf_474700520000
    ├─npap_visibility_block330050000
    ├─wrapper_ll_ip_tcp_u09439689818453048918317076030
    ├─(wrapper_ll_ip_tcp_u0)800800001920000
    ├─g0.i_tcpTxMux000040000
    ├─gen_WithUdp.i_udp36183570048388547500
    ├─gen_tcpConnections[0].i_t830078744260813768003
    ├─gen_tcpConnections[1].i_t793575014340774241003
    ├─gen_tcpConnections[2].i_t960791734340836068003
    ├─gen_tcpConnections[3].i_t832978954340824668003
    ├─gen_tcpConnections[4].i_t832278884340824768003
    ├─gen_tcpConnections[5].i_t832678924340824768003
    ├─gen_tcpConnections[6].i_t832278884340824868003
    ├─gen_tcpConnections[7].i_t831978854340824768003
    ├─gen_tcpConnections[8].i_t834079064340826368003
    ├─gen_tcpConnections[9].i_t832578914340824868003
    ├─iBusScheduler81107110700690000
    ├─i_internetLayer24232305118030460000
    ├─i_networkLayer1888180880022757100
    └─i_resetStretchStack474700350000


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