MLE NPAP Technical Specifications
| Feature | Specification |
|---|---|
| Supported on-chip Interfaces | 128 bit wide AXI4-Stream |
| Compatibility with 3rd party Ethernet PHY interfaces | Standard IEEE Ethernet PHYs with RMII, GMII, XGMII, etc via PCS/PMA via ASIC/FPGA Ethernet Subsystem |
| Compatibility with 3rd party Ethernet Media Access Controllers | Fraunhofer HHI 10G/25G Low-Latency MAC AMD/Xilinx 10G/25G Ethernet Subsystem (PG210) AMD/Xilinx 100G Ethernet Subsystem (PG165, PG203, PG314) Altera 10G / 25G Ethernet FPGA IP Microchip PolarFire FPGA 10G Ethernet (UG0727) Lattice 10G / 25G Ethernet IP (FPGA-IPUG-02245) |
| Supported protocols (Hardware based) | Ethernet, ARP, IPv4, ICMPv4 (response only), IGMPv4, UDP & TCP, DHCP (client only) |
| Number of simultaneous connections | One per TCP Core instantiation – see “Architecture Choices” below, a TCP Core in NPAP relates to a TCP socket in Linux |
| Message Sizes | Support for Ethernet Jumbo Frames of arbitrary length |
| Interface to application | Datapath via AXI4-Stream 128-bit and separate custom TCP command interface |
| Supported FPGAs | Complete stack uses generic VHDL code (IEEE-1076 2002 or 2008, depending on NPAP version) AMD/Xilinx Virtex 4 to Virtex UltraScale+ AMD/Xilinx Kintex to Kintex UltraScale+ AMD/Xilinx Artix UltraScale+ AMD/Xilinx Zynq-7000 AMD/Xilinx Zynq UltraScale+ MPSoC AMD/Xilinx Zynq UltraScale+ RFSoC AMD/Xilinx Versal ACAP Series AMD Versal Gen2 Altera Cyclone IV series Altera Cyclone 10 GX series Altera Stratix V Altera Stratix 10 GX series Altera Agilex 5 D, E Series Altera Agilex 7 F, I, M Series Lattice Avant-G, Avant-X Microchip Polarfire and PolarFire SoC |
| Performance | 70 Gbps line rate, or faster, for single TCP/IPv4 session (depending on clock rate, see below) Typ. 500 ns transport delay (depending on clock rate and packet size) |
| Verification | A full RTL simulation environment, including support for Wireshark PCAP stimulus files can be made available upon special request |
| Diagnostics & Debug | RTL code plus instrumentations for extensive statistics and diagnostics can be made available upon special request Optional functionality for Network Impairment (a.k.a. Bit Error Insertion) can be made available upon special request |