IP-Cores & Licensable Subsystem Stacks
ASIC / FPGA IP Cores & Licensable Subsystem Stacks
An intellectual property core (IP core), or so-called IP block, is a reusable unit of logic or integrated circuit layout design. MLE offers various pre-validated ASIC / FPGA IP cores and custom services for Network Acceleration, Storage Acceleration, PCIe Non-Transparent Bridge (PCIe NTB), AMD/Xilinx legacy devices, and Mixed-Signal applications.
MLE’s patented and patent pending technology provides distinct advantages for offloading and accelerating network protocol processing at speeds up to 100 Gbps in FPGA, or faster in ASIC.
Next-generation storage protocols such as NVMExpress (NVMe) provide significant performance benefits and, when combined with FPGAs, can be used for Computational Storage, Data-in-Motion processing and high-speed data capture and recording.
MLE provides complete system stacks for PCIe Connectivity between FPGAs, CPUs, GPUs and SoCs, which allow implementation of high-performance, low-latency data transfers without expert knowledge of PCIe. Our patented and patent pending technology can be used for PCIe direct connect or Long-Range Tunneling and supports topologies from PCIe point-to-point to networks using Non-Transparent Bridging.
Xilinx has selected MLE to provide long-term support for discontinued IP Cores including XPS USB 2.0 EHCI Host Controller and the XAUI and RXAUI IP Core for Xilinx devices.