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    Contact MLE for Design Services
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      FPGA Design Methodology

      Design Methodology

      FPGA Design Methogology

      Alan Kay once said: 

      “People who are really serious about software should make their own hardware!”

      Many decades later, Dennard’s scaling (the increase of clock frequency with each node size shrink) has stopped. In result, next year’s CPUs just don’t get much faster anymore. Hence, large companies like Apple and Google, for example, employ in-house teams of chip designers for implementing custom System-on-Chips and ASICs to optimize software-rich systems via so-called Domain-Specific Architectures.

      Other companies have been relying on us, Missing Link Electronics, to achieve the same effects for software performance and/or battery life optimization. To reduce NRE costs and risks instead of custom ASIC we integrate programmable logic and SoC FPGAs from vendors AMD/Xilinx, Intel PSG, Microchip, Lattice and else. Here some key aspects of our design methodology which enables us to deliver predictable success:

      Systems Realization requires sophisticated hardware / software partitioning to meet the cost, performance and functionality targets. In general, embedded system designers have to find a solution within the multi-dimensional space of

      • Behavior – the correct functioning for each use case.
      • Timing – performance as well as real-time aspects.
      • Concurrency – parallel handling of user and environmental requests.
      • Structure – for example, for manufacturing, servicability, reliability reasons.

      MLE has specialized in design methodologies for finding appropriate solutions on time and on budget. These design methodologies comprise:

      • Rapid Prototyping and Virtual Prototypes
      • Platform-Based Design
      • Hardware / Software Co-Design and Co-Verification

      Systems Realization

      Systems are more that the sum of their parts! And especially Embedded Systems are more than just hardware and software!

      To build better Embedded Systems, faster, MLE utilizes state-of-the-art techniques for Systems Realization:

      • Transaction-Level Modeling – which is a powerful concept for architectural exploration and analysis at Electronic-System-Level (ESL). Based on the IEEE 1666 SystemC language standard subsystems implemented in VHDL or Verilog Hardware Description Language (HDL) – a.k.a. the Hardware – can be brought together with subsystems implemented in C or C++ – a.k.a. the Software.
      • Virtual Platforms (VP) such as QEMU from the Open Source ecosystem or the Virtual System Platform from Cadence Design Systems, Inc. which generate executable system models very early-on during the development phase when target hardware may not even be available.

      Because these techniques offer important design visibility for the optimization, verification and debugging of complex Embedded Systems MLE will continue adopting new techniques for Systems Realization.

      Hardware-Software Co-Design

      MLE applies modern concepts of Hardware / Software Co-Design to the design of cost, performance, and power-driven Embedded Systems. The results are micro-architectures which are highly optimized towards the target application and, yet, are within a development project’s time and budget.

      The classical bottum-up approach leaves design projects with an incomplete system lacking full functionality until the very last component has been implemented, integrated and tested. MLE proposes a top-down design methodology where all vital functionality is provided by proven Open Source software from the very beginning. Subsequent iterations of cost, performance and power analysis with state-of-the-art tools then drive the migration of functionality between software and hardware for acceleration.

      MLE’s Hardware / Software Co-Design methodology supports so-called companion chip solution where an FPGA device is loosely-coupled to a CPU via PCI Express, for example. It also applies well to modern devices such as Xilinx’ Extensible Processing Platform which support tight-coupling between the CPU and the programmable logic. By combining sequential processing in standard CPUs with fast, parallel execution in programmable logic the system’s bandwidth and latency can significantly be improved, as it is described, for example, in the article “Building a Better Crypto Engine the Programmable Way” in Xcell Journal.

      Platform-Based Design

      Described by Professor Alberto Sangiovanni-Vincentelli from the University of California, Berkeley, as “Freedom from Choice!” Platform-Based Design and Component-Based Design are powerful methodologies. MLE applies these techniques to Embedded System design because of their great potentials. The combination of off-the-shelf components with a rich Open Source software stack delivers processing platforms which are:

      • Complete enough – to significantly reduce design complexity and, thereby, development costs and risks
      • Versatile – to be customizable, at hardware and at software level, for many target applications
      • Powerful – by combining standard processing with application specific co-processing
      • Cost efficient – from a development and from a bill-of-materials perspective to become viable solutions for industrial and automotive applications.

      MLE’s “Soft” Hardware Platform makes it easy to take advantage of new programmable device technology such as Extensible Processing Platforms.