# AMD/Xilinx
MLE Presents Automotive Rapid Prototyping System for SDV / Zonal Architectures
For the AMD Technology Day in Gothenburg, Sweden, MLE presented an automotive rapid prototyping system for architecture exploration and development of future Zone based automotive architectures. The outcome presented based…
MLE Releases Network Protocol Accelerator Platform (NPAP) Version 2.5.0
MLE has released Version 2.5.0 of its Network Protocol Accelerator Platform (NPAP). NPAP is the TCP/UDP/IP Full Accelerator from Fraunhofer HHI which enjoys production use in FPGA applications for automotive,…
MLE Releases NPAP TCP/UDP/IP Stack Version 2.4.3
MLE has released an update, Version 2.4.3., of its Network Protocol Acceleration Platform (NPAP). MLE’s Network Protocol Accelerator Platform (NPAP) runs the entire TCP/UDP/IPv4 protocol stack in a digital circuit, i.e.…
MLE Participates at AMD/Xilinx Security Working Group 2024
The AMD-Xilinx Security Working Group takes place face-to-face in Munich, Germany, from December 10-11, 2024. Presentations include the latest security features in Versal Gen 2 and other AMD FPGA families,…
MLE Participates at AMD/Xilinx Security Working Group 2023
The AMD-Xilinx Security Working Group takes place face-to-face in Munich, Germany, from December 5-6, 2023. Presentations include the latest security features in Versal ACAP and updates for the product roadmap.…