Presentation at PCI-SIG Developers Conference 2018
MLE presents “PCIe Range Extension via Robust, Long Reach Protocol Tunnels” at the PCI-SIG Developers Conference 2018.
(download slides) or visit our technical publications.
2nd Workshop: Programmable Processing for the Future and Autonomous Car
Nach dem erfolgreichen ersten Workshop, jetzt die Fortsetzung zum Thema “Programmable Processing for the Future and Autonomous Car – From classical FPGA to heterogeneous MPSoC“, unterstützen wir, MLE aus Neu-Ulm und die Firma Xilinx aus München, Herrn Professor Anestis Terzis von der Hochschule Ulm bei der Organisation und Durchführung der zweiten offiziellen Runde. Wir laden Sie dazu recht herzlich ein, am Dienstag, den 26. Juni 2018 ganztags in Ulm (Hochschule Campus Albert-Einstein-Allee) mit Fach- und Führungskräften aus aus Forschung und Entwicklung der “Region”, das Thema und die diversen Herausforderungen gemeinsam zu diskutieren.
MLE Joins OpenPOWER Foundation
MLE joins the OpenPOWER Foundation, an open technical community based on IBM’s POWER architecture to collaborate and to contribute OpenPOWER based FPGA accelerators for high-percormance compute and datacenter applications.
Valens Semiconductor Ltd.: Design Services for FPGA and ASIC
Valens is the inventor and the world leader in HDBaseT technology and a top provider of semiconductor products for the distribution of ultra-high-definition multimedia content, through a single cable, according to the needs of its target markets: AV, automotive, industrial, and consumer electronics.
Valens is always looking for the best in the class partners for innovative ideas development. At 2017 I had a pleasure to work with MLE on one of such ideas. MLE’s team showed responsiveness, professionalism, quality of work and competence during the work with Valens and helped to realize the goals. I found at MLE a talented and highly professional partner that contributed a lot to our success. Highly recommended !!!
Valens
Embedded World Conference 2018 – Technical Presentation
WED FEB 28, 2018 – 
Embedded World Conference 2018 at MCC Ost:
MLE presents “Analyzing the Generation and Optimization of an FPGA Accelerator with High-Level Synthesis” at Conference Session 12/III “FPGA based Hardware Solutions”, Beginning: 2:30 PM.
Embedded World Exhibition 2018
TUE FEB 27 – THU MAR 1st – Exhibition Nuremberg
MLE will be at Booth 4-670 in Hall 4. In Addition to our exhibitions and free advices from our Engineers, MLE hosts a demo at the Xilinx booth 3-311 in Hall 3 to showcase Neural Network design example on Ultra96 Board.
MLE is listed at AWS Marketplace
MLE is now listed at AWS Marketplace with FPGA-Accelerated Deep-Learning Inference with Binarized Neural Networks. For more information click the following link: http://aws.amazon.com/marketplace/pp/B0784D5WJK
Fraunhofer HHI and MLE to Collaborate on 25/50G Ethernet MAC
German Fraunhofer Heinrich-Hertz-Institute (HHI) and MLE collaborate to enhance Fraunhofer HHI's Low-Latency Ethernet MAC and TCP/IP Stack to support Xilinx UltraScale+ GTY Transceiver Technology for 25/50 Gig Ethernet.
MLE Supports Amazon EC2 F1 With Binarized Neural Network Inference
Users interested to witness the acceleration potential of FPGAs in the cloud for Machine Learning applications can now use an exemplary implementation of a reduced-precision Binarized Neural Network inference for CIFAR10 image classification, running on an Amazon EC2 F1 Instance.