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NVMe Streamer

NVMe (Non-Volatile Memory Express) has become the prominent choice for connecting Solid-State Drives (SSD) when storage read/write bandwidth is key. Electrically, the NVMe protocol operates on top of PCIe; it leaves behind legacy protocols such as AHCI, and thus scales well for performance.

MLE has been integrating PCIe, and NVMe, into FPGA-based systems for a while. Now, MLE releases NVMe Streamer which is a so-called Full Accelerator NVMe host subsystem integrated into FPGAs, and most prominently into Xilinx Zynq Ultrascale+ MPSoC and RFSoC devices.

MLE's new NVMe Streamer is the result of many successful customer projects and responds to the embedded market's needs to make use of modern SSDs. NVMe Streamer is a fully integrated and pre-validated subsystem stack operating the NVMe protocol fully in Programmable Logic (PL) with no software running, keeping the Processing System (PS) out of this performance path. For Xilinx FPGAs,  NVMe Streamer utilizes Xilinx GTH and GTY Multi-Gigabit Transceivers together with Xilinx PCIe Hard IP Cores for physical PCIe connectivity.


Key Features

  • Provides one or more NVMe / PCIe host ports for NVMe SSD connectivity.
  • Full Acceleration means "CPU-less" operation
  • Fully integrated and tested NVMe Host Controller IP Core.
  • PCIe Enumeration, NVMe Initialization & Identify, Queue Management.
  • Control & Status interface for IO commands and drive administration.
  • Approx. 50k LUTs and 170 BRAM tiles (for Xilinx UltraScale+)
  • Compatible with PCIe Gen 1 (2.5 GT/sec), Gen 2 (5 GT/sec), Gen 3 (8 GT/sec), Gen 4 (16 GT/sec) speeds.
  • Scalable to PCIe x1, x2, x4, x8 lanes.










  • High-speed analog and digital data acquisition.
  • Lossless and gapless recording of sensor data.
  • Automotive / Aerospace Data Logging.
  • Data streaming from SSDs.
  • Storage protocol offloading.


NVMe Streamer (as a licensable reference design) is available for the following FPGA families:

Products Availability Matrix


MLE's license fee structure reflects the needs for simple and affordable NVMe connectivit:

Product Name Deliverables Pricing

Evaluation Reference Design (NVMe Streamer ERD)

Binary-only system stack compiled under Vivado 2018.1 

Tried and tested to work on the Xilinx ZCU106 Development Kit.

Evaluation-only license, valid for 30 days.

free of charge

Production Reference Design - Professional Edition
(NVMe Streamer PRD-PE)

Complete, downloadable NVMe Host and Full Accelerator subsystem integrated into the ERD example system. Delivered as Vivado 2018.1 design project with encrypted RTL code.

Production-ready: Pre-integrated and tested to be portable to Your target system hardware.

Fully paid-up for, royalty-free, world-wide, Single-Project-Use License, synthesizable for 1 year.

Up to 40 hours of premium support, customization and/or integration design services via email, phone or online collaboration.
24,800.00 $

Application / Project specific Expert Design Services

System-level design, modeling, implementation and test for realizing Domain-Specific NVMe Streaming / Recording Architeture. 1,480.00 $ per engineering day


Datasheets and Documentation

Download the NVMe Streamer Product Brochure.

Read the MLE Technical Brief "NVMe Streamer for High-Speed FPGA Data Acquisition & Recording".

The Xilinx Wiki describes a software-only, non-accelerated alternative in "Linux ZynqMP PS-PCIe Root Port Driver".

Example designs on GitHub from Opsero for PS-based NVMe supporting various FPGA and MPSoC evaluation boards.