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      ASICAMD (Xilinx)AchronixIntel (Altera)LatticeMicrochip (MicroSemi)Other

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      Technical Publications

      MLE has been invited to numerous international seminars and webinars to share our experience in FPGA development using advanced PCI Express, TCP/UDP/IP stacks, and low-latency IP-core technologies for network and storage acceleration. Here we share the full technical articles and slides of the up-to-date presentations.

      Elektronik Embedded 2010

      Elektronik Embedded 2010

      Aug 7, 201212 years ago

      Die eigene Crypto-Engine im Xilinx-FPGA Elektronik embedded, March 2010 (download PDF, german) Implementing an AES crypto co-processor inside a Xilinx FPGA accelerates the PowerPC by factor 12.

      EETimes Europe Automotive

      EETimes Europe Automotive

      Aug 7, 201212 years ago

      Sigma-Delta converters for audio output in an infotainment FPGA EETimes europe AUTOMOTIVE June 2010 Use of FPGA technology to achieve high-quality analog audio in the parameterizable Altera PARIS infotainment platform.

      Xilinx XCELL Journal Issue 72

      Xilinx XCELL Journal Issue 72

      Aug 7, 201212 years ago

      Building a Better Crypto-Engine the Programmable Way Xilinx XCELL Journal, Issue 72, 2010 (download PDF) Hardware acceleration based on a Xilinx FPGA delivers a speedy system for AES encryption.

      ASICS.ws SATA Whitepaper

      ASICS.ws SATA Whitepaper

      Aug 7, 201212 years ago

      SATA Connectivity Solutions for Xilinx FPGAs To reduce the time and effort for designing Serial ATA enhanced Configurable Systems, ASICS World Services Ltd. and MLE are now offering a complete,…

      DAC Knowledge Center

      DAC Knowledge Center

      Aug 7, 201212 years ago

      Design Choices for Cyber-Physical Systems Design Automation Conference – Knowledge Center (visit website) Design choices for closed-loop Real-Time Control Systems, a special kind of Cyber-Physical Systems, to overcome the challenges…

      IO-Link Protocol Stack for a Configurable Microprocessor

      IO-Link Protocol Stack for a Configurable Microprocessor

      Aug 7, 201212 years ago

      Embedded World 2013 IO-Link Protocol Stack for a Configurable Microprocessor (download slides)   (download technical paper) A detailed overview over the IO-Link Protocol for Smart Sensors on configurable microprocessors in…

      Xilinx XCELL Journal Issue 81

      Xilinx XCELL Journal Issue 81

      Aug 7, 201212 years ago

      Xperts Corner Xilinx XCELL Journal, Issue 81, 2012 (download PDF) Testing and debugging Zynq SoC Designs with bus functional modelings (BFM).  

      Managing Latency and Bandwidth in HW/SW Co-Processing

      Managing Latency and Bandwidth in HW/SW Co-Processing

      Aug 7, 201212 years ago

      Embedded World 2012 Managing Latency and Bandwidth in HW/SW Co-Processing (download PDF) Metrics and experimental results to guide embedded system engineers during system architecture design and implementation on exemplary embedded…

      Optimizing Latency in Embedded Cloud Computing

      Optimizing Latency in Embedded Cloud Computing

      Aug 7, 201212 years ago

      Desing & Elektronik 2012 Optimizing Latency in Embedded Cloud Computing Motivation for Embedded Cloud Computing : ‘tiny’ embedded systems with huge storage capacity and processing power.

      Configurable Microcontroller Solutions to Counter Obsolescence

      Configurable Microcontroller Solutions to Counter Obsolescence

      Aug 7, 201212 years ago

      Design & Elektronik 2012 Configurable Microcontroller Solutions to Counter Obsolescence (download PDF) The gap between the product lifecycle of Embedded Systems and semiconductor components keeps widening which makes parts obsolescence…