The United States Patent and Trademark Office (USPTO) has issued to Missing Link Electronics, Inc. the US Patent No. 12,592,898 B2 for “Tightly-Coupled, Loosely Connected Heterogeneous Packet Based Transport”, a technology that finds applications in automotive networking, factory automation and robotics, sensor open system architectures, and 5G Radio campus networks.
The Automotive Ethernet Congress will be held on March 24-26, 2026 in Munich, Germany. There, MLE will present “Cost-Optimizing High-Accuracy Precision Time Protocol.”
ADAS with coherent, multi-static, digital RADAR benefits from automotive Ethernet but demands more precise time synchronization and clock-phase recovery.
First we give an overview over time synchronization: NTP, GNSS, PTP, with a deep-dive into the PTP (including hardware assisted time stamping for accuracy and precision around 10 nanoseconds), down to the high-accuracy Precision Time Protocol IEEE 1588-2019 (PTP-HA) developed by CERN’s White Rabbit group for large scale physics experiments in need of < 1 ns accuracy and < 100 ps precision.
Second we present “Light Rabbit”, a collaboration between CERN and MLE. Using modern on-chip PLL for phase-shifting we complement (or replace) expensive VCXOs and trade-off BoM cost vs. minor loss of accuracy.
We close with experimental results for an OFDM RADAR network where Ethernet transports status, control and sensor data and distributes time (i.e. trigger), frequency and phase information to steer oscillators in the RF subsystem.
Date: Thursday March 26, 2026
Session 6 – TSN (starts at 10:30am CEST)
Location: Science Congress Center Munich, Germany
Join us at Automotive Ethernet Congress 2026 to learn more about the “Light Rabbit” solution to complement White Rabbit technology for high-accuracy time synchronization of digital radar networks!
Modern Software-Defined Vehicle (SDV) architectures are pushing automotive in-vehicle networks towards more bandwidth and lower, guaranteed transport latency as cars are expected to be an integral part of a broader software and services eco-system, can be continuously updated/upgraded with new features, and achieve higher levels of autonomous driving. This challenges the current solutions (e.g. domain-centric E/E architectures) and methodologies used in the automotive industry as they are neither suitable nor sufficient to satisfy the requirements for a highly scalable tech-platform that efficiently transports and processes the high data volume of sensors used for ADAS (e.g. camera, radar, Lidar) and fulfill the demanding QoS requirements (e.g. delay, error, security).
The CeCaS project focuses on developing central car server architectures and supercomputing platforms for next-generation vehicles. Together with project partners, MLE helped implement an in-vehicle zone-based architecture for high-bandwidth connectivity between a so-called Zone ECU and a centralized computer.
With MLE’s Auto/TSN in-vehicle networking technology, deterministic networking at multi-Gigabit line rates was achieved by combining modern open standards such as IEEE Time-Sensitive Networking (TSN), the Internet Protocol, reliable transport layer protocols such as the Transmission Control Protocol (TCP) or the Reliable Rapid Request-Response Protocol (RRRRP) together with protocol Full Accelerators. Paired with Auto/RPS, MLE’s cost-optimized rapid SDV prototyping system for Zonal ECUs, the project was able to quickly explore and validate many assumptions, design choices, and trade-offs related to future zonal SDV architectures.
The CeCaS Project is funded by German Federal Ministry of Education and Research (BMBF) initiative MANNHEIM and was initiated between industry and academia for the future-proven automotive technology.
MLE has released Version 2.8.0 of its Network Protocol Accelerator Platform (NPAP) along with new versions for Evaluation Reference Designs, including support for AMD’s cost-optimized Artix Ultrascale+ device family.
NPAP is the TCP/UDP/IP Full Accelerator from Fraunhofer HHI which enjoys production use in FPGA applications for automotive, industrial, medical, robotics, test & measurement and wired/wireless communications.
Licensees who are under active maintenance are getting free access to the code update. Please refer to the updated MLE NPAP datasheet TB20251111 or visit http://MLEcorp.com/NPAP for more information.
At AMD’s 2025 EMEA Signal Processing Working Group on Oct. 29-31 at AMD Dublin, Ireland, MLE presented the newest storage acceleration technology: the NVMe Fast FPGA RAID (FFRAID).
With MLE NVMe FFRAID you can transfer, gapless and loss-less, bulky data from multiple sensors to a RAID of NVMe SSDs at aggregated speeds up to 400 Gbps. Multiple systems can further be cascaded via IEEE 1588-2019 (HA) Precision Time Synchronization (PTP) for faster and/or deeper recording.
MLE NVMe FFRAID implements a channel-based architecture where each data source/sink can be associated with a dedicated RAID engine and a dedicated storage space.
The Driving the Future Symposium will be held on October 8-9 in Munich, Germany. There, MLE will present “From Software to Silicon: Accelerating Automotive In-Vehicle Network Protocols for Zonal Architectures.”
Modern Software-Defined Vehicle (SDV) architectures are pushing automotive in-vehicle networks towards more bandwidth and lower, guaranteed transport latency.
In the Symposium, work presented is intermediate results from joint research project “CeCaS,” which is co-funded by the German Bundesministerium für Forschung, Technologie und Raumfahrt. We will also showcase how MLE and partner Trenz Electronic put together an Automotive Rapid Prototyping System (Auto/RPS) based on AMD’s Versal Edge AI devices to swiftly building the automotive networks in the CeCaS project.
Date: Wed-Thu Oct 8-9, 2025
Location: Hotel Vier Jahreszeiten Kempinski, Munich, Germany
MLE Robo/TSN converges OT and IT networks and, thereby, enables virtualized PLCs in a Factory Cloud via secure “tunnels” to transport existing OT fieldbus protocols over standard IEEE TSN Ethernet. MLE Robo/TSN was recently featured in two articles from CODESYS GmbH:
About CODESYS Group
The CODESYS Group ranks among the world’s leading software manufacturers in the automation industry. The company´s main focus is the development and distribution of CODESYS, the well-known integrated IEC 61131-3 development environment (IDE) for controller applications and CODESYS Control, the platform independent runtime system.
CC-Link, short for Control and Communications Link, is a widely adopted fieldbus system used in industrial automation. The CC-Link Partner Association (CLPA), based in Japan, is dedicated to promoting the CC-Link fieldbus industrial network in response to recent needs for control system optimization.
MLE has joined CLPA to facilitate the integration of CC-Link IE (Industrial Ethernet) and Time-Sensitive Networking (TSN)—advancing next-generation industrial networking solutions that are faster, more synchronized, and ready for the future of automation.
Missing Link Electronics (MLE) is now a partner of Lattice Semiconductor, providing a range of pre-validated FPGA IP cores and licensable system stacks optimized for Lattice FPGAs. This collaboration is aimed at accelerating the design projects of Lattice FPGA users with proven, ready-to-integrate solutions.
By combining MLE’s optimized subsystems with Lattice’s low-power, mid-range FPGAs, customers gain a streamlined path to robust networking solutions across a wide range of sectors, including communications, computing, industrial, and automotive applications.
MLE’s application-specific solutions integrate subsystem stacks with the new Multi-Gigabit Lattice FPGAs to deliver real-time communication for industrial connectivity and automotive networking.
