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      ASICAMD (Xilinx)AchronixIntel (Altera)LatticeMicrochip (MicroSemi)Other

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      MLE Open-Sources Build System for Xilinx Vivado

      To facilitate an FPGA Build Environment which can be automated, for example for Continuous Integration (CI), and which ensures fully reproducible results later in the development and product lifecycle, the Team at Missing Link Electronics has put together a collection of scripts. Currently focused on the Xilinx Vivado toolchain (Version 2016.4 or newer) and tested under Ubuntu Linux 16.04 LTS and 18.04 LTS, this scripted FPGA Build Environment has recently been made available at GitHub (https://github.com/missinglinkelectronics/vivado-build-system ) under open source Apache 2.0 license. 

      Team MLE welcomes any feedback and contribution from the FPGA ecosystem!


       

      MLE Featured Premier Xilinx Alliance Partner

      Xilinx features Missing Link Electronics as a Premier Partner offering IP, Design Services and Software for key markets Aerospace & Defense, Automotive, Data Center, Industrial, Wired Communications, Wireless Communication.

      Solutions and services from Missing Link Electronics include Security (OP-TEE), crypto subsystems, connectivity (PCIe, Ethernet, USB, SATA, NVMe) IP integration, camera/lidar/radar data acquisition and aggregation processing, Functional Safety, TCP/UDP/IP Full Accelerators, Key-Value-Store Accelerators, Digital Signal Processing IP (PAM/QAM Multi-format mapper, OFDM transmitter, WOLA channelizer, Adaptive time-domain equalizer, FFT), PetaLinux Design Service.


       

      Embedded World Exhibition 2019 – Xilinx Booth

      TUE FEB 26 – THU FEB 28 – Exhibition Nuremberg – live demo at the Xilinx Booth

      Booth 3A-235: Zync UltraScale+ RFPSoC – Software Defined Radio

      This Software Defined Radio demonstration showcases the Zynq® UltraScale+™ RDSoC multi-giga-sample RF data converters, and soft-decision forward error correction (SD-FEC), integrated into a SoC architecture. Complete with an ARM® Cortex™-A53 processing subsystem, UltraScale+ programmable logic, and the highest signal processing bandwith in a Zynq UltraScale+ device, this family provides a comprehensive FR signal chain for wireless, cable access, test & measurement, early warning / radar, and other high performance FR applications.