MLE has been invited to numerous international seminars and webinars to share our experience in FPGA development using advanced PCI Express, TCP/UDP/IP stacks, and low-latency IP-core technologies for network and storage acceleration. Here we share the full technical articles and slides of the up-to-date presentations.
Presentation at the Embedded World Conference 2015 Combining network protocol acceleration technology from Fraunhofer HHI with Vivado HLS for programming Xilinx Zynq All Programmable SoC. (download slides)
Presentation at the Konferenz für ARM-Systementwicklung 2014 High-Level-Synthesis Design for Xilinx Zynq Accelerators with Vivado HLS (in German). (download slides)
Presentation at Flash Memory Summit 2014 A case for low-latency Ethernet connectivity for Solid-State Disks (SSD). (download slides)
2014 UKACC International Conference on Control An implementation strategy of nonlinear model predictive controller for FPGA systems using high-level synthesis of a real-time MPC algorithm by means of the Xilinx…