# Network Acceleration
MLE Releases NPAP TCP/UDP/IP Stack Version 1.8.0
MLE has released Version 1.8.0 of NPAP, the TCP/UDP/IP Full Accelerator from Fraunhofer HHI. Changes include fixes for UDP, padding for Ethernet frames smaller than 60 Bytes and an increase…
NPAP RTL Simulation Demonstrates Low-Latency TCP/IP
MLE has complemented NPAP, the TCP/UDP/IP Full Accelerator from Fraunhofer HHI, with an RTL Simulation environment for Xilinx Vivado ISim and for the Questa Advanced Simulator from Siemens EDA. This…
MLE & Intel PSG Optimize NPAP for Intel HyperFlex Architecture
As the outcome of joint engineering collaboration between Intel PSG and MLE Germany, an new version of NPAP, the TCP/UDP/IP Full Accelerator from Fraunhofer HHI was released by MLE. This…
CORUNDUM – From a NIC to a Platform for In-Network Compute
Presentation at FOSDEM’22, February 5-6, 2022 This joint presentation between Alex Forencich, UC San Diego, and Ulrich Langenbach, MLE, provides an introduction to the corundum project, implementing a 100 GbE…
MLE Releases NPAP for MicroSemi PolarFire
In response to customer requests, MLE has ported NPAP-10G, the low-latency TCP/UDP/IP Full Accelerator for 10 Gigabit Ethernet to MicroSemi PolarFire FPGAs. MLE is now working with partner MicroSemi and…
Deterministic Networking with TSN-10/25/50/100G
MLE presents “Deterministic Networking with TCP-TSN-Cores for 10/25/50/100 Gigabit Ethernet” in Technical Brief MLE-TB20201203.
MLE Releases Update V1.4.9 for 10/25/40/50G TCP/IP Stack
Missing Link Electronics (MLE) has released update V1.4.9 for the network acceleration technology from German Fraunhofer Heinrich-Hertz-Institute. Changes include various fixes for corner cases and to enhance support for the…
MLE Releases 10/25 Gig Ethernet NPAP for Intel Stratix 10 FPGAs
With great support from the Intel PSG Team Europe, MLE has ported the 10/25 Gigabit Ethernet Network Protocol Acceleration Platform (NPAP) based on the TCP/UDP/IP Network Protocol Accelerator from Fraunhofer…
Network Protocol Acceleration with CAPI SNAP
Presentation at IBM OpenPOWER Summit Europe 2018 in Amsterdam, NL. Addressing Network Protocol Acceleration for IBM OpenPOWER Power8 and Power9 with the Coherent Accelerator Processor Interface (CAPI) Storage, Networking and…
Fraunhofer HHI and MLE to Collaborate on 25/50G Ethernet MAC
German Fraunhofer Heinrich-Hertz-Institute (HHI) and MLE collaborate to enhance Fraunhofer HHI's Low-Latency Ethernet MAC and TCP/IP Stack to support Xilinx UltraScale+ GTY Transceiver Technology for 25/50 Gig Ethernet.