Company - Missing Link Electronics

MLE presents “From Software to Silicon: Accelerating Automotive In-Vehicle Network Protocols for Zonal Architectures” at the “Driving the Future Symposium”

October 8, 2025Auto/RPS, auto/tsn, Automotive, CeCaS, Time-Sensitive Networking (TSN), trenz, Zonal Architecture, Zonal ECU

The Driving the Future Symposium will be held on October 8-9 in Munich, Germany. There, MLE will present “From Software to Silicon: Accelerating Automotive In-Vehicle Network Protocols for Zonal Architectures.”

Modern Software-Defined Vehicle (SDV) architectures are pushing automotive in-vehicle networks towards more bandwidth and lower, guaranteed transport latency.

In the Symposium, work presented is intermediate results from joint research project “CeCaS,” which is co-funded by the German Bundesministerium für Forschung, Technologie und Raumfahrt. We will also showcase how MLE and partner Trenz Electronic put together an Automotive Rapid Prototyping System (Auto/RPS) based on AMD’s Versal Edge AI devices to swiftly building the automotive networks in the CeCaS project.

Date: Wed-Thu Oct 8-9, 2025

Location: Hotel Vier Jahreszeiten Kempinski, Munich, Germany

MLE and CODESYS Collaborate on Converged OT/IT Networks for Virtualized PLCs

September 23, 2025Control System, Fieldbus, Real-Time, Robo/TSN, Time-Sensitive Networking (TSN), Virtualize Industrial Network, Virtualizing PLC

MLE Robo/TSN converges OT and IT networks and, thereby, enables virtualized PLCs in a Factory Cloud via secure “tunnels” to transport existing OT fieldbus protocols over standard IEEE TSN Ethernet. MLE Robo/TSN was recently featured in two articles from CODESYS GmbH:

“Die Echtzeithürde überwinden (Overcoming The Real-Time Hurdle)” in SPS Magazin 9, 2025
“Echtzeitanwendungen für Motion und Robotik mit virtuellen Steuerungen (Real-time Virtualized Motion Control for Industrial Automation)” by Dipl.-Ing. (FH) Roland Wagner, Head of Product Marketing, Codesys GmbH, Kempten as part 4 of mini series about modern industrial control systems in KEM Industrie

Learn More About MLE Robo/TSN

About CODESYS Group

The CODESYS Group ranks among the world’s leading software manufacturers in the automation industry. The company´s main focus is the development and distribution of CODESYS, the well-known integrated IEC 61131-3 development environment (IDE) for controller applications and CODESYS Control, the platform independent runtime system.

MLE Joins CC-Link Partner Association (CLPA)

July 31, 2025CC-Link, Fieldbus, Industrial Network, Time-Sensitive Networking (TSN), Virtualize Industrial Network

CC-Link, short for Control and Communications Link, is a widely adopted fieldbus system used in industrial automation. The CC-Link Partner Association (CLPA), based in Japan, is dedicated to promoting the CC-Link fieldbus industrial network in response to recent needs for control system optimization.

MLE has joined CLPA to facilitate the integration of CC-Link IE (Industrial Ethernet) and Time-Sensitive Networking (TSN)—advancing next-generation industrial networking solutions that are faster, more synchronized, and ready for the future of automation.

Lattice Semiconductor and Missing Link Electronics Become Partners to Accelerate FPGA Design Projects

July 17, 2025Lattice, Real-Time, Robo/TSN

Missing Link Electronics (MLE) is now a partner of Lattice Semiconductor, providing a range of pre-validated FPGA IP cores and licensable system stacks optimized for Lattice FPGAs. This collaboration is aimed at accelerating the design projects of Lattice FPGA users with proven, ready-to-integrate solutions.

By combining MLE’s optimized subsystems with Lattice’s low-power, mid-range FPGAs, customers gain a streamlined path to robust networking solutions across a wide range of sectors, including communications, computing, industrial, and automotive applications.

MLE’s application-specific solutions integrate subsystem stacks with the new Multi-Gigabit Lattice FPGAs to deliver real-time communication for industrial connectivity and automotive networking.

MLE Presents “Enabling PTP-based Time-of-Day Synchronization via 5G Sidelink” at Berlin 6G Conference 2025

July 11, 20255G Sidelink, 6G, GNSS, Precision Time Protocol (PTP), Real-Time, Time Synchronization

MLE Enabling PTP-based Time-of-Day Synchronization via 5G Sidelink

Berlin 6G Conference is the annual networking event of the German 6G Program, organized by the 6G Platform Germany, taking place at the Berlin Congress Center (BCC) from July 1-3, 2025. There, MLE presented “Enabling PTP-based Time-of-Day Synchronization via 5G Sidelink.”

GNSS is widely used for positioning and synchronization—particularly in applications, such as vehicles and drones, where merging recorded radar data and coordinating multiple nodes over-the-air is essential. Accurate time-stamping is crucial to ensure data integrity, which requires a reliable and common time source. However, GNSS connectivity can be limited or completely unavailable in challenging environments like tunnels or urban canyons, making precise synchronization difficult.

In this presentation, MLE showcases our approach to synchronize devices using PTP-based application layer time synchronization over 5G sidelink. We walk through the approach and implications of correlating PTP messages with 5G PHY layer frame timing, and briefly touch on a method for further improving the timestamp accuracy. In the end, we present our proof-of-concept demonstrator setup developed in collaboration with Fraunhofer HHI, along with initial experimental results, demonstrating microsecond-level time synchronization accuracy via PTP over 5G sidelink. Notably, this approach relies purely on existing mechanisms and requires no additional modifications to future 6G standards.

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MLE and Analog Devices Jointly Present “FPGA-Based Highly Configurable and Low-Latency Multi GMSL Camera 10GbE RTP Streaming: Performance and Design Choices” at FPGA Conference 2025

June 20, 2025Analog Devices, High Speed Camera, Low Latency, Precision Time Protocol (PTP), Real-Time

The FPGA Conference Europe 2025 will be held July 1-3 in Munich, Germany. There, Partner Analog Devices and MLE will together present “FPGA-Based Highly Configurable and Low-Latency Multi GMSL Camera 10GbE RTP Streaming: Performance and Design Choices.”

In the decade of high-performance networking and computing, FPGAs have arisen as a promising and highly convenient solution, offering flexibility, reprogramming capacity and parallelism options. The role of high-performance solutions that offer a high throughput in network-related operations is extremely beneficial in real-time processing tasks executed on embedded systems, such as real-time video streaming.

This presentation showcases the capabilities and obtained performance of our FPGA-based high-speed multi GMSL camera to RTP streaming solution using a single 10GbE link. There will be a walk through the multi GMSL Ser/Des integration, and the FPGA-powered components overview: the CSI-2 to RTP streams translation and the multi-GMSL camera synchronization, accompanied by the highly configurable and low-latency UDP/IP network accelerator. The described high-performance data path is integrated with the on-chip CPU subsystem to provide time synchronization via PTPv2 and enable control and monitoring of the device via the network. At the end of the presentation, we emphasize the most important design choices to build such a multi-camera streaming system. We finally draw the conclusions and the lessons learned from that successful experience.

Date: Thursday July 3rd, 2025

Track 2 – Embedded / Vision (starts at 1:30pm CEST)

Location: Hotel NH München Ost Conference Center, Munich, Germany

Join MLE and Analog Devices at FPGA Conference 2025 to discover how we built the highly configurable and low-latency Multi GMSL Camera for 10GbE RTP Streaming!

Enter the promo code FPGA25-CON-MEETME to get 20% discount on all tickets!

MLE Presents “In-Vehicle Network – Automotive Zone-based Architecture with Time Sensitive Network – Auto/TSN” at FPGA Conference 2025

June 20, 2025Auto/RPS, auto/tsn, Automotive, CeCaS, Time-Sensitive Networking (TSN), Zonal Architecture, Zonal ECU

The FPGA Conference Europe 2025 will be held July 1-3 in Munich, Germany. There, MLE will present “In-Vehicle Network – Automotive Zone-based Architecture with Time Sensitive Network – Auto/TSN.”

Automotive architectures are transforming: while more and more sensors become integrated in vehicles, the automotive industry is looking for ways to reduce wiring efforts in production, more scalability, higher level of integration and faster ways development.

Auto/TSN stands for automotive data over Time-Sensitive Networks which is an in-vehicle network infrastructure based on open standards such as IEEE Ethernet.

Auto/TSN virtualizes the in-vehicle network infrastructure: Key objective is to reduce costs, increase scalability and enable upgradability for next-generation automotive architectures including electric and/or autonomous vehicles.

The presentation will show how a zone based architecture can look like in comparison to the “classic” wiring. It will explain the tasks of a zone gateway and why FPGA/Soc play a major role in sensor fusion. Further more why it is important to use middleware which turns devices in a service for a central car server and other ECUs. For visualization, we will show examples of the government funded CeCaS research project and show the complete chain from camera sensors over zone gateways to the central car server.

Date: Thursday July 3rd, 2025

Track 1 – Application (starts at 11:50am CEST)

Location: Hotel NH München Ost Conference Center, Munich, Germany

Join us at FPGA Conference 2025 to learn more details about the automotive zone-based architecture with TSN technology!

Enter the promo code FPGA25-CON-MEETME to get 20% discount on all tickets!

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MLE Presents Automotive Rapid Prototyping System for SDV / Zonal Architectures

June 17, 2025AMD Versal, AMD/Xilinx, Auto/RPS, Automotive, CeCaS, Network Acceleration, TCP/IP, trenz, Zonal ECU

MLE zonal architecture demo with AutoRPS

For the AMD Technology Day in Gothenburg, Sweden, MLE presented an automotive rapid prototyping system for architecture exploration and development of future Zone based automotive architectures. The outcome presented based on a practical example of work done in the MANNHEIM CeCaS Project.

The national funded research project MANNHEIM CeCaS (Central Car Server) was initiated between industry and academia, focusing on the creation of fundamental hardware and software building blocks for next-generation automotive technology. Key innovations span from chip technology & HW acceleration, E/E architecture & topology, to networking & communication, software architecture & abstraction, housing & cooling, as well as methodologies like AI-based system modelling and HW/SW co-design.

Driven by the needs, and constraints, of the CeCaS Project MLE and partner Trenz Electronic have put together an Automotive Rapid Prototyping System (Auto/RPS) based on AMD’s Versal Edge AI devices. See here www.missinglinkelectronics.com/auto-rps for more details on Auto/RPS.

Learn more about MLE Auto/RPS

MLE Releases Network Protocol Accelerator Platform (NPAP) Version 2.5.0

April 24, 2025AMD/Xilinx, Intel Agilex 5, Intel/Altera, IP Update, IPv4, Network Acceleration, NPAP, TCP/IP, UDP

MLE Releases NPAP TCPUDPIP Stack Version 2.5.0

MLE has released Version 2.5.0 of its Network Protocol Accelerator Platform (NPAP).

NPAP is the TCP/UDP/IP Full Accelerator from Fraunhofer HHI which enjoys production use in FPGA applications for automotive, industrial, medical, robotics, test & measurement and wired/wireless communications.

Newly introduced features include built-in diagnostics plus functionality to emulate Network Impairment.

Also added was support for the new Agilex 5E FPGA devices from Altera where MLE NPAP integrates with the GTS Ethernet Intel® FPGA Hard IP.

Licensees who are under active maintenance are getting free access to the code update. Please refer to the updated MLE NPAP datasheet TB20250331 or visit http://MLEcorp.com/NPAP for more information

Update to NPAP V2.5.0