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      Network Element Virtualization (NEV) With FPGA

      To enable Network Element Virtualization (NEV) for telefommunications Algoblu Co. L.t.d. from Ottawa, Ontario, Canada, has worked with Missing Link Electronics (MLE) to design and test FPGA-based turnkey solutions.

      With NEV technology, carriers can virtualize the underlying network and can fine-tune the management of network resources to provide multi-tiered services with end-to-end service quality assurance. At Provider Equipment (PE) level, NEV has been implemented as an FPGA-based PCIe card to accelerate Algoblu software running on server CPUs. For the corresponding Customer Premise Equipment (CE) a turnkey solution was designed based on an off-the-shelf FPGA System-on-Module. For more information on the NEV technology, please read the Network Element Virtualization (NEV) Whitepaper here.

      Network Element Virtualization Whitepaper

      SmartNICs Make Better Networks! At SmartNICsSummit 2022, held April 26-28 in the Doubletree Hotel in San Jose, CA, Algoblu and MLE will present solutions for NEV and the use case of low-latency application. For more details, please read the joint whitepaper “Network Element Virtualization”. With a foreword by Awanish Verma, Principal Architect and Director in the newly formed Data Center and Communications Group (DCCG) at AMD, Algoblu, a NaaS provider, and Missing Link Electronics, a premier partner in Xilinx Alliance ecosystem, will show how they use FPGA technology to implement Network Element Virtualization (NEV) to accelerate SD-WAN adoption.

      MLE Presents at FPGA Conference Europe 2022

      At FPGA Conference Europe 2022, MLE will present “A 10 Gigabit Ethernet TCP/IP Stack Implementation on Microsemi PolarFire for High-Speed Camera Image Transport” and will give details on FPGA-based TCP/UDP/IP Full Acceleration for camera based system. FPGA Conference Europe 2022 is organized by fellow Xilinx Alliance member PLC2 and will take place July 5-7, 2022 at the NH München Ost Conference Center.

      MLE NPAC-40G – A Cost-Efficient PCIe SmartNIC Solution

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      MLE has partnered with Fraunhofer HHI and Elemaster Germany to provide the industry-proven TCP/UDP/IP Network Protocol Accelerator Platform (NPAP) in form of NPAC-40G, a PCIe Network Protocol Accelerator Card. NPAC-40G implements reliable high-bandwidth low-latency TCP/UDP/IP transport plus Linux PCIe stream drivers and, optionally, can run customizable In-Network Processing using the Intel’s Stratix 10 GX 400 FPGA.

      CORUNDUM Project Releases AMD/Xilinx Zynq MPSoC Support

      CORUNDUM, the open source In-Network Compute Platform hosted on Github now supports the integrated ARM A53 Processing System of AMD/Xilinx Zynq UltraScale+ MPSoC FPGA. Based on key contributions from MLE this work allows implementing complete Linux subsystems running within the SmartNIC, separate and independent from the underlying host operating system. Work was tested using the Sidewinder-100 card from Fidus Systems, a fellow AMD/Xilinx Alliance member.

      MLE Integrates CORUNDUM MQNIC Support into DPDK

      MLE has integrated support for the CORUNDUM project’s MQNIC into the open source Data Plane Development Kit. MQNIC is the open source network interface card within CORUNDUM, the open source FPGA-based In-Network Compute Platform. DPDK now has support for a single interface and a single port per interface of MQNIC. MLE work was tested with a 10G version of MQNIC build for the Fidus Sidewinder-100 board which features an AMD/Xilinx Zynq UltraScale+ MPSoC ZU19EG.