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      MLE Co-Exhibits with Prodesign at Super Computing Conference 2023

      Partner ProDesign and MLE will showcase the latest FPGA-based High-Performance Compute solutions at Super Computing Conference SC23

      To address the acceleration needs of Disaggregated Computational Storage or At-Speed In-Network Processing, the featured solutions integrate MLE’s FPGA-based networking and storage accelerators with the latest ProDesign’s FALCON Agilex® 7 M Acceleration Card (based on Intel® Agilex® 7 FPGA), supporting up to 3x 400 GbE. 

      Also featured will be a Reliable, Rapid Request-Response Protocol (RRRRP) based on the Homa protocol from Stanford University professor John Ousterhout

      Date: November 12-17, 2023

      Location: Colorado Convention Center, Denver, CO

      Booth: #266

      Join us at SC23 to learn about the latest technology and applications with high performance computing!

      MLE and Trenz Verify the AMD/Xilinx Versal™ AI Edge Device and Accelerate Networking and Storage with 10G/25G/50G/100G TCP/IP Core

      Network and Storage Acceleration IPs Verified on AMD/Xilinx Versal

      MLE and Trenz Electronic, both Premier Members of the AMD Adaptive Computing Partner Program, have collaborated and worked on Trenz’s new TE0950 AMD/Xilinx Versal™ AI Edge Evalboard to provide an integrated and pre-validated network and storage accelerating solution.

      To realize network acceleration with AMD/Xilinx Versal™ AI Edge device, MLE implements the latest version of the TCP/IP Network Protocol Accelerator Platform which gains enhancements for performance and interoperability, on the TE0950 AMD/Xilinx Versal™ AI Edge Evalboard. Currently the 10G/25G TCP/IP Core is verified on the board in the Linux system, and testing with 50G/100G TCP/IP Core is also scheduled.

      MLE also tested Opsero’s FPGA Drive FMC Gen4 with our NVMe Streamer, the full accelerator NVMe host subsystem, to enable high read/write bandwidth for SSD mass storage connectivity. We implement and verify a single PCIe x4 Gen4 SSD with 16GT/s transfer rate on the TE0950 AMD/Xilinx Versal™ AI Edge Evalboard.

      MLE is dedicated to de-risking system design via integration and development services and FPGA Full System Stacks. Through testing in the MLE lab, we can verify the compatibility between Trenz’s new TE0950 board and our IP-core accelerators and its performance in accelerating networking and storage. 

      SNIA Storage Developers Conference, Sept. 18-21, 2023 in Fremont, CA

      The Storage Developers Conference (SDC) 2023 of SNIA, the Storage and Networking Industry Alliance, will be held Sept. 18-21 in Fremont, CA.

      There, MLE will present “How Bad is TCP? (And What Are the Alternatives?)“. TCP is ubiquitous, however, it has some significant drawbacks including unpredictable tail latency and a significant computational burden. MLE will share quantitative analysis results and describing alternatives.

      One of which is the “Homa” protocol from John Ousterhout’s team at Stanford University. Homa is an implementation of a so-called Quad-RP, i.e. Rapid, Reliable Request-Response Protocol: Instead of streams it is message based and connectionless, which caters better to the needs of modern distributed, microserviced, virtualized architectures.

      MLE Joins the EtherCAT Technology Group

      EtherCAT, the Ethernet Fieldbus, is the open real-time Ethernet network originally developed by Beckhoff. EtherCAT sets new standards for real-time performance and topology flexibility.

      Nick-named “Robo/TSN”, MLE is extending its patented and patent pending technology to provide industrial, medical, and robotics networking solutions combining high-accuracy time-synchronization with high data rates of 100 Gbps, and faster. Robo/TSN will be capable of interfacing with, and tunneling of, EtherCAT.

      FPGA Drives Next-gen Automatic Test Equipment

      Advantest is a world-class manufacturer of advanced automatic test equipment (ATE) for the semiconductor industry. Missing Link Electronics (MLE) has been involved in our advanced FPGA design efforts over several different tester models. 

      In 2021 and 2022 we engaged MLE to help in supporting the development of PCIe Gen 5 and NVMe interface on our ATE systems.

      The MLE engineers that were assigned to work with us were experienced and very knowledgeable.

      They coordinated with our internal team extremely well and were able to deliver working designs on-time and within budget.

      AAI

      Looking for FPGA Design Service for Automatic Test Equipment?

      News

      News

      MLE continues to work with a wide range of partners to develop advanced FPGA-based networking and storage applications, as well as to share our experience and latest research results in seminars as well as webinars. Here we share our latest news and events.

      MLE Presents at Embedded World 2023

      MLE Presents at Embedded World 2023

      Mar 14, 2023 3 years ago

      5G Radio addresses machine-type communication with low energy demands. 5G Edge Clouds reduce processing latency by bringing extra compute close to the “edge”. To be cost efficient, Edge Cloud systems…

      MLE Opens R&D Offices at Schindler Innovation Hub in Berlin

      MLE Opens R&D Offices at Schindler Innovation Hub in Berlin

      Mar 1, 2023 3 years ago

      Berlin has always been a hot-bed for research and development of new communication technologies. BMBF funded Project 6G-ICAS4Mobility along with the German Platform for Future Communication Technologies and 6G (6G…

      MLE Participates at AMD/Xilinx Security Working Group 2022

      MLE Participates at AMD/Xilinx Security Working Group 2022

      Dec 6, 2022 4 years ago

      The AMD-Xilinx Security Working Group takes place face-to-face in Munich, Germany, from December 6-7, 2022. Presentations include the latest security features in Versal ACAP and updates for the product roadmap.…

      MLE Joins Central Car Server Supercomputing Research for Automotive, Funded by German BMBF

      MLE Joins Central Car Server Supercomputing Research for Automotive, Funded by German BMBF

      Dec 1, 2022 4 years ago

      Advanced Driver-Assist Systems (ADAS) and Autonomous Vehicle (AV) functions require a challeging combination of of compute performance and energy efficiency, especially when deployed in Battery Electric Vehicles (BEV). MLE has…

      Intel Partner Alliance Gold Status Renewed

      Intel Partner Alliance Gold Status Renewed

      Dec 1, 2022 4 years ago

      Intel Corporation has renewed MLE’s Gold Status membership in the Intel Partner Alliance for 2023. The Intel Partner Alliance unifies all partners in a modern program that enables collaboration and…

      MLE’s Auto/TSN for Digital RADAR Networks Receives BMBF Funding

      MLE’s Auto/TSN for Digital RADAR Networks Receives BMBF Funding

      Dec 1, 2022 4 years ago

      In-Vehicle Networks of the future will be driven by the large bandwidth needs of modern sensors, in particular Radar (Radio Detection and Ranging), and more importantly networks of digital Radar…

      MLE exhibits at SC22

      MLE exhibits at SC22

      Nov 4, 2022 4 years ago

      Partner ProDesign and MLE will showcase High-Performance Compute solutions at Super Computing Conference SC22. To address the acceleration needs of Disaggregated Computational Storage, ElasticSearch, or At-Speed In-Network Processing the featured…

      MLE Joins German 6G Radio Initiative, Receives BMBF Funding

      MLE Joins German 6G Radio Initiative, Receives BMBF Funding

      Nov 1, 2022 4 years ago

      Integrated Communication and Sensing (ICAS) has become a key research topic for realizing next-generation mobility solutions. For 6G Radio, ICAS enables sensor systems to cooperate and to interact via 6G…

      MLE Presents at SNIA SDC 2022

      MLE Presents at SNIA SDC 2022

      Jul 21, 2022 4 years ago

      At SNIA Storage Developers Conference (SDC) 2022, on Sept. 14, MLE and partner Fraunhofer IPMS will present “Converging PCIe and TSN Ethernet for Composable Infrastructure in High-Performance In-Vehicle Embedded Systems”:…

      MLE FPGA IP Core Patent US11356388 p1

      US Patent 11,356,388 for Real-Time Multi-Protocol Heterogeneous Packet-Based Transport

      Jun 7, 2022 4 years ago

      Missing Link Electronics has been awarded US Patent 11,356,388 on Real-Time Multi-Protocol Heterogeneous Packet-Based Transport which covers real-time and time-synchronization aspects when tunneling packets such as PCI Express (PCIe) Transaction-Layer…

      Success Stories

      Success Stories

      Over the last decade, MLE has gained deep experience working with clients and partners on FPGA-based subsystems for a wide range of applications, such as networking, storage, telecommunication, automotive, aerospace/defense, test & measurement, and video streaming. 

      Corundum DPDK Driver

      MLE presents an initial DPDK driver for the corundum multi-queue network interface card (mqnic). The driver is available via the respective github repository of Missing Link Electronics.

      DPDK is the acronym for Data Plane Development Toolkit and it consists of libraries to accelerate packet processing workloads running on a wide variety of CPU architectures. To enable packet reception and transmission, a driver is required to integrate various NICs into the DPDK.

      Corundum mqnic is a project aiming at providing a fully open source FPGA based in network compute platform, comprising Linux drivers and gateware supporting various FPGA vendors, families and devices.

      The Missing Link Electronics DPDK Driver for the Corundum mqnic now enables a fully open source development environment for high-performance network processing research. This may involve new hardware software partitioning as, for the first time, both the hardware and the software side are available as open source.

      The driver is available for multiple dpdk-stable versions 22.11, 21.11 and 20.11 and supports multiple interfaces per device. It has been tested against corundum version 0965c77 using a ZCU106 implementation featuring 2x 10 GbE interfaces and a custom Fidus Sidewinder-100 implementation featuring 8x 10G interfaces. The tests are based on the DPDK forwarding example and an iperf client and server running on two additional machines, connected to one of the network interfaces implemented by corundum, each.